ATMEGA329V-8MU Atmel, ATMEGA329V-8MU Datasheet - Page 240

• Manufacturer Part Number: ATMEGA329V-8MU
• Description: IC AVR MCU 32K 8MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA329V-8MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

240
ATmega329/3290/649/6490
• Bit 7 – LCDCS: LCD Clock Select
When this bit is written to zero, the system clock is used. When this bit is written to one, the
external asynchronous clock source is used. The asynchronous clock source is either
Timer/Counter Oscillator or external clock, depending on EXCLK in ASSR. See
Operation of Timer/Counter2” on page 151
• Bit 6 – LCD2B: LCD 1/2 Bias Select
When this bit is written to zero, 1/3 bias is used. When this bit is written to one, ½ bias is used.
Refer to the LCD Manufacture for recommended bias selection.
• Bit 5:4 – LCDMUX1:0: LCD Mux Select
The LCDMUX1:0 bits determine the duty cycle. Common pins that are not used are ordinary port
pins. The different duty selections are shown in
Table 23-2.
Note:
• Bits 3:0 – LCDPM3:0: LCD Port Mask
The LCDPM3:0 bits determine the number of port pins to be used as segment drivers. The dif-
ferent selections are shown in
Table 23-3.
LCDPM3
LCDMUX1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
1
1
1. 1/2 bias when LCD2B is written to one and 1/3 otherwise.
LCDPM2
LCD Duty Select
LCDMUX0
LCD Port Mask (Values in bold are only available in ATmega3290/6490)
0
0
0
0
1
1
1
1
0
0
0
0
1
0
1
0
1
LCDPM1
0
0
1
1
0
0
1
1
0
0
1
1
0
Static
Duty
Table
1/2
1/3
1/4
LCDPM0
23-3. Unused pins can be used as ordinary port pins.
0
1
0
1
0
1
0
1
0
1
0
1
0
1/2 or 1/3
1/2 or 1/3
1/2 or 1/3
for further details.
Static
Bias
I/O Port in Use as
Table
Segment Driver
(1)
(1)
(1)
SEG0:12
SEG0:14
SEG0:16
SEG0:18
SEG0:20
SEG0:22
SEG0:23
SEG0:24
SEG0:26
SEG0:28
SEG0:30
SEG0:32
SEG0:34
23-2.
COM Pin
COM0:1
COM0:2
COM0:3
COM0
Maximum Number
of Segments
I/O Port Pin
COM1:3
COM2:3
COM3
None
13
15
17
19
21
23
24
25
27
29
31
33
35
“Asynchronous
2552K–AVR–04/11