COP8SGR728M7/NOPB National Semiconductor, COP8SGR728M7/NOPB Datasheet - Page 39

MCU 8BIT CMOS ROM OTP 28-SOIC

COP8SGR728M7/NOPB

Manufacturer Part Number
COP8SGR728M7/NOPB
Description
MCU 8BIT CMOS ROM OTP 28-SOIC
Manufacturer
National Semiconductor
Series
COP8™ 8SGr
Datasheet

Specifications of COP8SGR728M7/NOPB

Core Processor
COP8
Core Size
8-Bit
Speed
15MHz
Connectivity
Microwire/Plus (SPI), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC
Data Bus Width
8 bit
Maximum Clock Frequency
15 MHz
Data Ram Size
512 B
Number Of Programmable I/os
40
Number Of Timers
3
Height
2.34 mm
Interface Type
USART
Length
17.91 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.49 mm
For Use With
COP8SG-EPU - BOARD PROTOTYPE/TARGET COP8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
COP8SGR728M7
10.0 Interrupts
Programming Example: External Interrupt
WAIT:
INT_EXIT:
SERVICE:
PSW
CNTRL
RBIT
RBIT
SBIT
SBIT
SBIT
JP
.
.
.
.=0FF
VIS
.
.
.
.=01FA
.ADDRW SERVICE
.
.
RETI
.
.
RBIT
.
.
.
JP
INT_EXIT
EXPND, PSW
(Continued)
=00EF
=00EE
0,PORTGC
0,PORTGD
IEDG, CNTRL
EXEN, PSW
GIE, PSW
WAIT
; G0 pin configured Hi-Z
; Ext interrupt polarity; falling edge
; Enable the external interrupt
; Set the GIE bit
; Wait for external interrupt
; The interrupt causes a
; branch to address 0FF
; The VIS causes a branch to
;interrupt vector table
; Vector table (within 256 byte
; of VIS inst.) containing the ext
; interrupt service routine
; Interrupt Service Routine
; Reset ext interrupt pend. bit
; Return, set the GIE bit
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