MCF5471ZP200 Freescale Semiconductor, MCF5471ZP200 Datasheet - Page 23

IC MPU 32BIT COLDF 388-PBGA

MCF5471ZP200

Manufacturer Part Number
MCF5471ZP200
Description
IC MPU 32BIT COLDF 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MCF547xr
Datasheet

Specifications of MCF5471ZP200

Core Processor
Coldfire V4E
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
99
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.43 V ~ 1.58 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
388-BGA
Family Name
MCF5xxx
Device Core
ColdFire V4e
Device Core Size
32b
Frequency (max)
200MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5/3.3V
Operating Supply Voltage (max)
1.58/3.6V
Operating Supply Voltage (min)
1.43/3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
For Use With
M5475EVBGHS - KIT DEV GHS FOR M5475EVBM5474GFE - MODULE M5474 FIRE ENGINEM5474LITEKIT - KIT DEV FOR MCF547X
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5471ZP200
Manufacturer:
Freescale
Quantity:
92
Part Number:
MCF5471ZP200
Manufacturer:
MOTOLOLA
Quantity:
490
11.2
Freescale Semiconductor
Num
Num
M5
M6
M7
M8
M1
M2
M3
M4
MII Transmit Signal Timing
RXD[3:0], RXDV, RXER to RXCLK setup
RXCLK to RXD[3:0], RXDV, RXER hold
RXCLK pulse width high
RXCLK pulse width low
TXCLK to TXD[3:0], TXEN, TXER invalid
TXCLK to TXD[3:0], TXEN, TXER valid
TXCLK pulse width high
TXCLK pulse width low
TXD[3:0] (Outputs)
RXD[3:0] (Inputs)
RXCLK (Input)
TXCLK (Input)
RXDV,
RXER
TXEN,
TXER
Figure 20. MII Transmit Signal Timing Diagram
Figure 19. MII Receive Signal Timing Diagram
Characteristic
MCF547x ColdFire
Characteristic
Table 16. MII Transmit Signal Timing
Table 15. MII Receive Signal Timing
M5
M1
M3
M7
®
Microprocessor, Rev. 4
M2
M6
M4
M8
35%
35%
35%
35%
Min
Min
5
0
Fast Ethernet AC Timing Specifications
5
Max
65%
65%
Max
65%
65%
25
RXCLK period
RXCLK period
TXCLK period
TXCLK period
Unit
Unit
ns
ns
ns
ns
23

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