UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 520

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.5.3 Trigger modes
trigger mode and hardware trigger modes. The hardware trigger modes include timer trigger modes 0 and 1, and
external trigger mode. The ADA0M0.ADA0TMD bit is used to set the trigger mode. The hardware trigger modes are
set by the ADA0M2.ADA0TMD1 and ADA0M2.ADA0TMD0 bits.
518
The timing of starting conversion is specified by setting a trigger mode. The trigger modes include a software
(1) Software trigger mode
(2) External trigger mode
ADA0M0 Register
ADA0TMD Bit
When the ADA0M0.ADA0CE bit is set to 1, the signal of the analog input pin (ANIn pin) specified by the ADA0S
register is converted. When conversion is complete, the result is stored in the ADA0CRn register. At the same
time, the A/D conversion end interrupt request signal (INTAD) is generated.
If the operation mode specified by the ADA0M0.ADA0MD1 and ADA0M0.ADA0MD0 bits is the continuous
select/scan mode, the next conversion is started, unless the ADA0CE bit is cleared to 0 after completion of the
first conversion. Conversion is performed once and ends if the operation mode is the one-shot select/scan
mode.
When conversion is started, the ADA0M0.ADA0EF bit is set to 1 (indicating that conversion is in progress).
If the ADA0M0, ADA0M2, ADA0S, ADA0PFM, or ADA0PFT register is written during conversion, the conversion
is aborted and started again from the beginning. However, writing to these registers is prohibited in the normal
conversion mode and one-shot select mode/one-shot scan mode in the high-speed conversion mode (n = 0 to
11).
In this mode, converting the signal of the analog input pin (ANIn pin) specified by the ADA0S register is started
when an external trigger is input (to the ADTRG pin). Which edge of the external trigger is to be detected (that
is, the rising edge, falling edge, or both rising and falling edges) can be specified by using the
ADA0M0.ADA0ETS1 and ADA0M0.ATA0ETS0 bits. When the ADA0CE bit is set to 1, the A/D converter waits
for the trigger, and starts conversion after the external trigger has been input.
When conversion is completed, the result of conversion is stored in the ADA0CRn register, regardless of
whether the continuous select, continuous scan, one-shot select, or one-shot scan mode is set as the
operation mode by the ADA0MD1 and ADA0MD0 bits. At the same time, the INTAD signal is generated, and
the A/D converter waits for the trigger again.
When conversion is started, the ADA0EF bit is set to 1 (indicating that conversion is in progress). While the
A/D converter is waiting for the trigger, however, the ADA0EF bit is cleared to 0 (indicating that conversion is
stopped). If a valid trigger is input during conversion, the conversion is aborted and started again from the
beginning.
0
1
ADA0TMD1 Bit
−
0
0
1
1
ADA0M2 Register
ADA0TMD0 Bit
CHAPTER 14 A/D CONVERTER
Table 14-4. Trigger Modes
User’s Manual U18953EJ5V0UD
−
0
1
0
1
Software trigger mode
External trigger mode (based on ADTRG pin valid edge
detection)
Timer trigger mode 0 (based on INTTP2CC0 interrupt request
occurrence)
Timer trigger mode 1 (based on INTTP2CC1 interrupt request
occurrence)
Setting prohibited
Trigger Mode