UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 713

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.7 I
the INTIICn signal timing (n = 0 to 2).
19.7.1 Master device operation
The following shows the value of the IICSn register at the INTIICn interrupt request signal generation timing and at
(1) Start ~ Address ~ Data ~ Data ~ Stop (normal transmission/reception)
2
<1> When IICCn.WTIMn bit = 0
<2> When WTIMn bit = 1
C Interrupt Request Signals (INTIICn)
ST
ST
Δ 5: IICSn register = 00000001B
Δ 4: IICSn register = 00000001B
Remarks 1.
Remarks 1.
1: IICSn register = 1000X110B
2: IICSn register = 1000X000B
3: IICSn register = 1000X000B (WTIMn bit = 1)
4: IICSn register = 1000XX00B
1: IICSn register = 1000X110B
2: IICSn register = 1000X100B
3: IICSn register = 1000XX00B
AD6 to AD0
AD6 to AD0
2. n = 0 to 2
2. n = 0 to 2
Δ: Generated only when SPIEn bit = 1
X: don’t care
Δ: Generated only when SPIEn bit = 1
X: don’t care
: Always generated
: Always generated
R/W
R/W
ACK
ACK
1
1
D7 to D0
D7 to D0
User’s Manual U18953EJ5V0UD
CHAPTER 19 I
2
ACK
ACK
2
C BUS
2
D7 to D0
D7 to D0
IICCn.SPTn bit = 1
3
ACK
ACK
SPTn bit = 1
↓
↓
4
3
SP
SP
Δ5
Δ4
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