UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 874

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
24.4.3 Reset operation by low-voltage detector
system reset is executed (when the LVIM.LVIMD bit is set to 1), and the hardware is initialized to the initial status.
LVI detection voltage.
below or exceeds the detected voltage.
872
Main clock oscillator (f
Subclock oscillator (f
Internal oscillator
Peripheral clock (f
Internal system clock (f
CPU clock (f
CPU
Watchdog timer 2
RTC
Internal RAM
I/O lines (ports/alternate-function
pins)
On-chip peripheral I/O register
LVI
On-chip peripheral functions other
than above
If the supply voltage falls below the voltage detected by the low-voltage detector when LVI operation is enabled, a
The reset status lasts from when a supply voltage drop has been detected until the supply voltage rises above the
The main clock oscillator is stopped during the reset period.
When the LVIMD bit is cleared to 0, an interrupt request signal (INTLVI) is generated if the supply voltage falls
Note
Remark
Note
μ
PD70F3792, 70F3793 only.
CPU
For the reset timing of the low-voltage detector, see CHAPTER 26 LOW-VOLTAGE DETECTOR (LVI).
)
Item
X
Table 24-3. Hardware Status During Reset Operation by Low-Voltage Detector
to f
XT
X
)
X
)
XX
/1,024)
),
Operation stops.
Oscillation stops.
Oscillation continues.
Oscillation stops.
Operation stops
Initialized
Operation stops (initialized to 0).
Operation continues
Undefined
High impedance
Initialized to specified status, OCDM register retains its value.
Operation stops.
Operation stops.
CHAPTER 24 RESET FUNCTION
User’s Manual U18953EJ5V0UD
During Reset
Oscillation starts.
Operation starts after securing oscillation
stabilization time.
Operation starts after securing oscillation
stabilization time (initialized to f
Program execution starts after securing
oscillation stabilization time
Counts up from 0 with internal oscillator
clock as source clock.
Operation can be started after securing
oscillation stabilization time.
Oscillation starts.
After Reset
XX
/8).