UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1025

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Set C0MDATAxm,
C0MDLCm registers.
Clear RTR bit of
C0MCONFm register.
Set C0MIDLm and
C0MIDHm registers.
Cautions 1. The TRQ bit should be set after the RDY bit is set.
Remarks 1. Check the MBON bit at the start and end of the interrupt routine to see if the message buffer and
Data frame
2. The RDY bit and TRQ bit should not be set at the same time.
2. If the TOVF bit is set (1) again, the transmit history list contradicts. Therefore, scan all the
transmit history register can be accessed, because a CAN sleep mode transition request which
has been held pending may be under execution. If the MBON bit is cleared (0), stop the
processing under execution. Re-execute the processing after the MBON bit is set (1) again. It is
therefore recommended to cancel the CAN sleep mode transition request before executing
transmission interrupt servicing.
transmit message buffers that have completed transmission.
No
Figure 20-44. Transmission via Interrupt (Using C0TGPT Register)
Read C0TGPT register.
Transmit completion
interrupt servicing
Clear TOVF bit = 1
Clear RDY bit = 1
Clear TOVF bit.
Set RDY bit = 0
remote frame?
TOVF bit = 1?
Clear RDY bit.
RDY bit = 0?
Data frame
START
or
Yes
Yes
No
Remote frame
Set C0MDLCm register.
Set RTR bit of
C0MCONFm register.
Set C0MIDLm and
C0MIDHm registers.
CHAPTER 20 CAN CONTROLLER
Clear RDY bit = 0
Clear RDY bit = 0
Set RDY bit = 1
Set RDY bit = 1
THPM bit = 1?
Set TRQ bit.
Set RDY bit.
END
Yes
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No