UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 555

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Figure 9-54. Operation Example (When TT0SCE Bit = 1, TT0ZCL Bit = 1, TT0BCL Bit = 0, TT0ACL Bit = 1, TT0UDS1 and
Encoder clear input
(TENC00 pin input)
(TENC01 pin input)
INTTT0CC0 signal
INTTT0CC1 signal
INTTT0CC0 signal
TT0CCR0 register
TT0CCR1 register
TT0CCR0 register
(TECR0 pin input)
(iv) If the high level is input to the TECR0 pin later than the low level is input to the TENC01 pin while the
TT0CNT register
Peripheral clock
Encoder input
Encoder input
timing signal
counter is counting up, the counter is cleared after it counts up.
Clear signal
If the counter is cleared in this way, a miscount does not occur even if inputting the signal to the TECR0 pin is
late, because the clear level condition of the TECR0, TENC01, and TENC00 pins is set and the 16-bit counter
is cleared to 0000H when the clear level condition is detected.
TT0UDS0 Bits = 11, TECR0 = High Level, TENC01 = Low Level, and TENC00 = High Level) (3/3)
Count
Compare match interrupt request signal is not generated.
N
0000H (when TT0CCR1 register is set to 0000H)
N
N − 1 (when TT0CCR0 register is set to N − 1)
−
N (when TT0CCR0 register is set to N)
1
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
H
L
H
0000H
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