UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 977

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
20.7 Bit Set/Clear Function
An operation error occurs if the following registers are written directly. Do not write any values directly via bit manipulation,
read/modify/write, or direct writing of target values.
below to set or clear the lower 8 bits in these registers.
bit status after set/clear operation is specified in Figure 20-26). Figure 20-25 shows how the values of set bits or clear bits
relate to set/clear/no change operations in the corresponding register.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The CAN control registers include registers whose bits can be set or cleared via the CPU and via the CAN interface.
Remark
All the 16 bits in the above registers can be read via the usual method. Use the procedure described in Figure 20-25
Setting or clearing of lower 8 bits in the above registers is performed in combination with the higher 8 bits (refer to the
CAN0 global control register (C0GMCTRL)
CAN0 global automatic block transmission control register (C0GMABT)
CAN0 module control register (C0CTRL)
CAN0 module interrupt enable register (C0IE)
CAN0 module interrupt status register (C0INTS)
CAN0 module receive history list register (C0RGPT)
CAN0 module transmit history list register (C0TGPT)
CAN0 module time stamp register (C0TS)
CAN0 message control register (C0MCTRLm)
Register’s current value
m = 00 to 31
Register’s value after
write operation
Write value
Figure 20-25. Example of Bit Setting/Clearing Operations
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
clear 1
set
0
1
0
1
1
0
0
1
1
0
1
0
CHAPTER 20 CAN CONTROLLER
0
0
0
0
0
1
1
0
1
0
0
1
1
1
0
0
0
0
0
0
0
0
1
0
1
1
0
1
0
1
Page 977 of 1509

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