SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 14

• Manufacturer Part Number: SAK-TC1736-128F80HL AA
• Description: IC MCU 32BIT 1MB FLASH 144LQFP
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1736-128F80HL AA

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 70
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Packages: PG-LQFP-144
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 48.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 1.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 2-1
Function of Bits
s
f
2.1.4
Read and write access to registers and memory locations are sometimes restricted. In
memory and register access tables, the terms as defined in
Table 2-2
Symbol
U
SV
R
32
E
PW
NC
BE
nBE
nE
Data Sheet
Intro, V1.1
Register Access Modes
Bit Function Terminology (cont’d)
Access Terms
Description
Access Mode: Access permitted in User Mode 0 or 1.
Reset Value: Value or bit is not changed by a reset operation.
Access permitted in Supervisor Mode.
Read-only register.
Only 32-bit word accesses are permitted to this register/address range.
Endinit-protected register/address.
Password-protected register/address.
No change, indicated register is not changed.
Indicates that an access to this address range generates a Bus Error.
Indicates that no Bus Error is generated when accessing this address
range, even though it is either an access to an undefined address or the
access does not follow the given rules.
Indicates that no Error is generated when accessing this address or
address range, even though the access is to an undefined address or
address range. True for CPU accesses (MTCR/MFCR) to undefined
addresses in the CSFR range.
Description
Bits with this attribute are “sticky” in one direction. If their reset
value is once overwritten by software, they can be switched
again into their reset state only by a reset operation. Software
cannot switch this type of bit into its reset state by writing the
register. This attribute can be combined to “rws” or “rwhs”.
Bits with this attribute are readable only when they are accessed
by an instruction fetch. Normal data read operations will return
other values.
10
Table 2-2
are used.
Introduction
V1.1, 2009-08
TC1736