SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 8

• Manufacturer Part Number: SAK-TC1736-128F80HL AA
• Description: IC MCU 32BIT 1MB FLASH 144LQFP
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1736-128F80HL AA

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 70
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Packages: PG-LQFP-144
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 48.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 1.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

1
•
•
•
•
•
•
•
•
•
Data Sheet
High-performance 32-bit super-scalar TriCore V1.3.1 CPU with 4-stage pipeline
– Superior real-time performance
– Strong bit handling
– Fully integrated DSP capabilities
– Single precision Floating Point Unit (FPU)
– Up to 80 MHz operation at full temperature range
Multiple on-chip memories
– Up to 36 Kbyte Data Memory (LDRAM)
– 8 Kbyte Code Scratchpad Memory (SPRAM)
– Up to 1 Mbyte Program Flash Memory (PFlash)
– 32 Kbyte Data Flash Memory (DFlash, represents 8Kbyte EEPROM)
– Instruction Cache: up to 8Kbyte (ICACHE, configurable)
– 4 Kbyte Overlay Memory (OVRAM)
– 16 Kbyte BootROM (BROM)
8-Channel DMA Controller
Sophisticated interrupt system with 255 hardware priority arbitration levels serviced
by CPU
High performing on-chip bus structure
– 64-bit Local Memory Buses between CPU, Flash and Data Memory
– 32-bit System Peripheral Bus (SPB) for on-chip peripheral and functional units
– One bus bridges (LFI Bridge)
Versatile On-chip Peripheral Units
– Two Asynchronous/Synchronous Serial Channels (ASC) with baud rate generator,
– Two High-Speed Synchronous Serial Channels (SSC) with programmable data
– One serial Micro Second Bus interface (MSC) for serial port expansion to external
– One High-Speed Micro Link interface (MLI) for serial inter-processor
– One MultiCAN Module with 2CAN nodes and 64 free assignable message objects
– One General Purpose Timer Array Modules (GPTA) providing a powerful set of
24 analog input lines for ADC
– 2 independent kernels (ADC0, ADC1)
– Analog supply voltage range from 3.3 V to 5 V (single supply)
– Performance for 12 bit resolution (@f
2 different FADC input channels
Extreme fast conversion, 21 cycles of
parity, framing and overrun error detection
length and shift direction
power devices
communication
for high efficiency data handling via FIFO buffering and gateway data transfer
digital signal filtering and timer functionality to realize autonomous and complex
Input/Output management
Summary of Features
f
FADC
4
ADCI
clock (262.5 ns @
= 10 MHz)
Summary of Features
f
FADC
= 80 MHz)
V1.1, 2009-08
TC1736