SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 45

• Manufacturer Part Number: SAK-TC1736-128F80HL AA
• Description: IC MCU 32BIT 1MB FLASH 144LQFP
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1736-128F80HL AA

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 70
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Packages: PG-LQFP-144
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 48.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 1.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.5.5
This TC1736 contains one Micro Link Interface, MLI0.
The Micro Link Interface (MLI) is a fast synchronous serial interface to exchange data
between microcontrollers or other devices, such as stand-alone peripheral components.
Figure 2-9
MLI interfaces.
Figure 2-9
Features
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Data Sheet
Synchronous serial communication between an MLI transmitter and an MLI receiver
Different system clock speeds supported in MLI transmitter and MLI receiver due to
full handshake protocol (4 lines between a transmitter and a receiver)
Fully transparent read/write access supported (= remote programming)
Complete address range of target device available
Specific frame protocol to transfer commands, addresses and data
Error detection by parity bit
32-bit, 16-bit, or 8-bit data transfers supported
Programmable baud rates
– MLI transmitter baud rate: max.
– MLI receiver baud rate: max.
Address range protection scheme to block unauthorized accesses
Multiple receiving devices supported
Peripheral
Memory
Micro Link Interface
shows how two microcontrollers are typically connected together via their
A
Typical Micro Link Interface Connection
System Bus
Controller 1
CPU
Peripheral
MLI
B
f
MLI
f
MLI
/2 (= 40 Mbit/s @ 80 MHz module clock)
41
Peripheral
MLI
C
System Bus
Controller 2
CPU
Peripheral
Memory
D
MCA06061
Introduction
V1.1, 2009-08
TC1736