SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 17

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SAK-TC1736-128F80HL AA

Manufacturer Part Number
SAK-TC1736-128F80HL AA
Description
IC MCU 32BIT 1MB FLASH 144LQFP
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1736-128F80HL AA

Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
70
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Packages
PG-LQFP-144
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
48.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
1.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
STM
WDT
2.2
The TC1736 combines three powerful technologies within one silicon die, achieving new
levels of power, speed, and economy for embedded applications:
DSP operations and addressing modes provide the computational power necessary to
efficiently analyze complex real-world signals. The RISC load/store architecture
provides high computational bandwidth with low system cost. On-chip memory and
peripherals are designed to support even the most demanding high-bandwidth real-time
embedded control-systems tasks.
Additional High-level features of the TC1736 include:
System Features
The TC1736 is a high-performance microcontroller with TriCore CPU, program and data
memories, buses, bus arbitration, an interrupt controller, a DMA controller and several
on-chip peripherals. The TC1736 is designed to meet the needs of the most demanding
embedded
price/performance, real-time responsiveness, computational power, data bandwidth,
and power consumption are key design elements.
The TC1736 offers several versatile on-chip peripheral units such as serial controllers,
timer units, and Analog-to-Digital converters. Within the TC1736, all these peripheral
units are connected to the TriCore CPU/system via the System Peripheral Bus (SPB)
and the Local Memory Bus (LMB). Several I/O lines on the TC1736 ports are reserved
for these peripheral units to communicate with the external world.
Data Sheet
Reduced Instruction Set Computing (RISC) processor architecture
Digital Signal Processing (DSP) operations and addressing modes
On-chip memories and peripherals
Program Memory Unit – instruction memory and instruction cache
Serial communication interfaces – flexible synchronous and asynchronous modes
DMA Controller – DMA operations and interrupt servicing
General-purpose timers
High-performance on-chip buses
On-chip debugging and emulation facilities
Flexible interconnections to external components
Flexible power-management
Maximum CPU clock frequency: 80 MHz
Maximum System Peripheral Bus frequency: 80 MHz
System Architecture of the TC1736
control
System Timer
Watchdog Timer
systems
applications
13
where
the
competing
Introduction
V1.1, 2009-08
issues
TC1736
of

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