SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 36

• Manufacturer Part Number: SAK-TC1736-128F80HL AA
• Description: IC MCU 32BIT 1MB FLASH 144LQFP
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1736-128F80HL AA

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 70
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Packages: PG-LQFP-144
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 48.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 1.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.5.1
The TC1736 includes two Asynchronous/Synchronous Serial Interfaces, ASC0 and
ASC1. Both ASC modules have the same functionality.
Figure 2-5
(ASC).
Figure 2-5
The ASC provides serial communication between the TC1736 and other
microcontrollers, microprocessors, or external peripherals.
The ASC supports full-duplex asynchronous communication and half-duplex
synchronous communication. In Synchronous Mode, data is transmitted or received
synchronous to a shift clock that is generated by the ASC internally. In Asynchronous
Mode, 8-bit or 9-bit data transfer, parity generation, and the number of stop bits can be
selected. Parity, framing, and overrun error detection are provided to increase the
reliability of data transfers. Transmission and reception of data is double-buffered. For
multiprocessor communication, a mechanism is included to distinguish address bytes
from data bytes. Testing is supported by a loop-back option. A 13-bit baud rate generator
provides the ASC with a separate serial clock signal, which can be accurately adjusted
by a prescaler implemented as fractional divider.
Data Sheet
Intro, V1.1
Address
Decoder
Interrupt
Control
Control
Clock
To DMA
Asynchronous/Synchronous Serial Interfaces
shows a global view of the Asynchronous/Synchronous Serial Interface
General Block Diagram of the ASC Interface
EIR
TBIR
TIR
RIR
f
ASC
(Kernel)
Module
ASC
32
RXD
TXD
Control
Port
MCB05762_mod
Introduction
V1.1, 2009-08
RXD
TXD
TC1736