UPSD3433E-40T6 STMicroelectronics, UPSD3433E-40T6 Datasheet - Page 210

• Manufacturer Part Number: UPSD3433E-40T6
• Description: MCU 8BIT 8032 128KB FLASH 52TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40T6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-TQFP, 52-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4906

PSD module
28.5.3
28.5.4
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Table 163. Flash memory instruction sequences
1. All values are in hexadecimal, X = Don’t care.
2. 8032 addresses A12 through A15 are “Don’t care” during the instruction sequence decoding. Only address
3. Directing this command to any individual sector within a Flash memory array will invoke the bulk erase of
Reading Flash memory
Under typical conditions, the 8032 may read the Flash memory using READ operations
(READ bus cycles) just as it would a ROM or RAM device. Alternately, the 8032 may use
READ operations to obtain status information about a Program or Erase operation that is
currently in progress. The following sections describe the kinds of READ operations.
Read memory contents
Flash memory is placed in the Read Array mode after Power-up, after a PSD module reset
event, or after receiving a Reset Flash memory instruction sequence from the 8032. The
8032 can read Flash memory contents using standard READ bus cycles anytime the Flash
array is in Read Array mode. Flash memories will always be in Read Array mode when the
array is not actively engaged in a program or erase operation.
Reading the erase/program status bits
The Flash arrays provide several status bits to be used by the 8032 to confirm the
completion of an erase or program operation on Flash memory, shown in
page
complete.
The 8032 performs a READ operation to obtain these status bits while an erase or program
operation is being executed by the state machine inside each Flash memory array.
Data polling flag (DQ7)
While programming either Flash memory, the 8032 may read the Data Polling Flag Bit
(DQ7), which outputs the complement of the D7 Bit of the byte being programmed into Flash
memory. Once the program operation is complete, DQ7 is equal to D7 of the byte just
programmed into Flash memory, indicating the program cycle has completed successfully.
Resume
Sector
Erase
Reset
Flash
Instr.
Seq.
bits A0-A11 are used during decoding of Flash memory instruction sequences. The individual sector select
signal (FS0 - FS7 or CSBOOT0-CSBOOT3) which is active during the instruction sequence determines the
complete address.
all Flash memory sectors within that array.
212. The status bits can be read as many times as needed until an operation is
Write 30h to
address that
activates FSx
or CSBOOTx
where
desired to
resume erase
(command)
Write F0h to
address that
activates FSx
or CSBOOTx
in desired
array.
(command)
Cycle 1
Bus
Cycle 2
Bus
Cycle 3
Bus
Cycle 4
UPSD3422, UPSD3433, UPSD3434, UPSD3454
Bus
Cycle 5
Bus
(1)(2)
(continued)
Cycle 6
Bus
Cycle 7
Bus
Table 164 on
page 217
page 218
erase on
Flash on
Resume
sector
Reset
Link