UPSD3433E-40T6 STMicroelectronics, UPSD3433E-40T6 Datasheet - Page 38

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UPSD3433E-40T6

Manufacturer Part Number
UPSD3433E-40T6
Description
MCU 8BIT 8032 128KB FLASH 52TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433E-40T6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-TQFP, 52-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4906

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0
8032 MCU registers
7
7.1
7.2
7.3
38/300
8032 MCU registers
The UPSD34xx has the following 8032 MCU core registers, also shown in
Figure 10. 8032 MCU registers
Stack pointer (SP)
The SP is an 8-bit register which holds the current location of the top of the stack. It is
incremented before a value is pushed onto the stack, and decremented after a value is
popped off the stack. The SP is initialized to 07h after reset. This causes the stack to begin
at location 08h (top of stack). To avoid overlapping conflicts, the user must initialize the top
of the stack to 20h if all four banks of registers R0 - R7 are used, as well as the top of stack
to 30h if all of the 8032 bit memory locations are used.
Data pointer (DPTR)
DPTR is a 16-bit register consisting of two 8-bit registers, DPL and DPH. The DPTR register
is used as a base register to create an address for indirect jumps, table look-up operations,
and for external data transfers (XDATA). When not used for addressing, the DPTR register
can be used as a general purpose 16-bit data register.
Very frequently, the DPTR register is used to access XDATA using the external direct
addressing mode. The UPSD34xx has a special set of SFR registers (DPTC, DPTM) to
control a secondary DPTR register to speed memory-to-memory XDATA transfers. Having
dual DPTR registers allows rapid switching between source and destination addresses (see
details in
Program counter (PC)
The PC is a 16-bit register consisting of two 8-bit registers, PCL and PCH. This counter
indicates the address of the next instruction in program memory to be fetched and executed.
A reset forces the PC to location 0000h, which is where the reset jump vector is stored.
Section 11: Dual data pointers on page
AI06636
DPTR(DPH)
PCH
DPTR(DPL)
R0-R7
PSW
PCL
SP
UPSD3422, UPSD3433, UPSD3434, UPSD3454
A
B
Accumulator
B Register
Stack Pointer
Program Counter
Program Status Word
General Purpose
Register (Bank0-3)
Data Pointer Register
57).
Figure
10.

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