UPSD3433E-40T6 STMicroelectronics, UPSD3433E-40T6 Datasheet - Page 70

• Manufacturer Part Number: UPSD3433E-40T6
• Description: MCU 8BIT 8032 128KB FLASH 52TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40T6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-TQFP, 52-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4906

MCU clock generation
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Figure 13. Clock generation logic
Table 27.
Table 28.
CCON0[6]
PCON[1]
PLLM[4]
(f OSC )
Bit 7
XTAL1
Bit
7
6
5
4
Power-Down Mode
PCON[1]: PD,
CCON0: clock control register (SFR F9h, reset value 50h)
CCON0 register bit definition
UPLLCE
PLLM[4]
Symbol
DBGCE
PLLEN
PLLEN
Bit 6
UPLLCE
Bit 5
R/W
R,W
R,W
R,W
R,W
Clock Divider
Q
Q
Q
Q
Q
Q
Q
Clock Pre-Scaler Select
Upper bit of the 5-bit PLLM[4:0] Multiplier (Default: '0' for
PLLM = 00h)
PLL Enable
USB Clock Enable
Debug Unit Breakpoint Comparator Enable
XTAL1 (default)
XTAL1 /2
XTAL1 /4
XTAL1 /8
XTAL1 /16
XTAL1 /32
DBGCE
XTAL1 /1024
XTAL1 /2048
0 = Disable PLL operation
1 = Enable PLL operation (Default condition after reset)
0 = USB clock is disabled (Default condition after reset)
1 = USB clock is enabled
0 = JTAG Debug Unit comparators are disabled
1 = JTAG Debug Unit comparators are enabled (Default
condition after reset)
Bit 4
CCON[2:0],
UPSD3422, UPSD3433, UPSD3434, UPSD3454
CLK
EN
(to: TIMER0/1/2, UART0/1, PCA0/1, SPI, I2C, ADC)
PLL
CPUAR
Bit 3
0
1
2
3
4
5
6
7
3
M
U
X
PCON[0]: IDL,
Definition
Idle Mode
Bit 2
CPUPS[2:0]
PERIPH_CLK (f OSC )
MCU_CLK (f MCU )
Bit 1
(to: 8032, WDT)
USB_CLK
AI10433b
Bit 0