UPSD3433E-40T6 STMicroelectronics, UPSD3433E-40T6 Datasheet - Page 247

• Manufacturer Part Number: UPSD3433E-40T6
• Description: MCU 8BIT 8032 128KB FLASH 52TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40T6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-TQFP, 52-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4906

UPSD3422, UPSD3433, UPSD3434, UPSD3454
Note:
1
Port D pins can also be configured in PSDsoft as pins for other dedicated functions:
●
●
Port D also supports the Fast Slew Rate output drive type option using the csiop Drive
Select registers.
Figure 87. Port D structure
Optional function on a specific Port D pin.
From DPLD
From AND-
OR array
From PLD
input bus
PD1 can be used as a common clock input to all 16 OMC Flip-flops (see
Section 28.1.11: OMCs on page
down (APD) on page
PD2 can be used as a common chip select signal (CSI) for the Flash and SRAM
memories on the PSD module (see
page
into standby mode regardless of what other internal memory select signals are doing
on the PSD module. This is specified in PSDsoft as “PSD Chip Select Input, CSI”.
253). If driven to logic ’1’ by an external source, CSI will force the Flash memory
To power management and PLD input bus
8032
8032 RD
From DPLD external chip (ECSx)
8032
data
WR
bits
PT Output Enable (.OE)
DATA
PSD module reset
8032
BIT
registers
D
CSIOP
Directly to PLD input bus, no IMC
CLR
M
Q
P
D
B
U
X
Q
Q
1
2
3
4
5
Registers
One of 5
CSIOP
Directions
(MCUI/O)
Data out
To power management
Direction
Drive select
Data out
(MCUI/O)
Enable Out
Data in (MCUI/O)
Drive
Reset
250.
195) and also the
Section 28.5.55: Chip select input (CSI) on
PSDsoft
CLKIN
CSI
1
2
PD1. PIN, PD2.PIN
O
M
U
T
P
U
T
U
X
(1)
(1)
Enable
Output
Output
Enable
Drive select type
Section 28.5.53: Automatic power-
output
Pin
Slew rate
1 = Fast
No
hysteresis
CMOS
buffer
I/O port D
Pin input
V
logic
DD
V
PSD module
DD
pin, port D
AI09182
Typical
247/300