MC68HC705C8ACP Freescale Semiconductor, MC68HC705C8ACP Datasheet - Page 147

IC MCU 4MHZ 8K OTP 40-DIP

MC68HC705C8ACP

Manufacturer Part Number
MC68HC705C8ACP
Description
IC MCU 4MHZ 8K OTP 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8ACP

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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11.7 SPI Error Conditions
11.7.1 Mode Fault Error
11.7.2 Write Collision Error
MC68HC705C8A — Rev. 3
MOTOROLA
These conditions produce SPI system errors:
A mode fault error results when a logic 0 occurs on the PD5/SS pin of a
master SPI. The MCU takes these actions when a mode fault error
occurs:
Writing to the SPDR during a transmission causes a write collision error
and sets the WCOL bit in the SPSR. Either a master SPI or a slave SPI
can generate a write collision error.
Freescale Semiconductor, Inc.
For More Information On This Product,
Bus contention caused by multiple master SPIs (mode fault error)
Writing to the SPDR during a transmission (write-collision error)
Failing to read the SPDR before the next incoming byte sets the
SPIF bit (overrun error)
Puts the SPI in slave mode by clearing the MSTR bit
Disables the SPI by clearing the SPE bit
Sets the MODF bit
Master — A master SPI can cause a write collision error by writing
to the SPDR while the previously written byte is still being shifted
out to the PD3/MOSI pin. The error does not affect the
transmission of the previously written byte, but the byte that
caused the error is lost.
Slave — A slave SPI can cause a write collision error in either of
two ways, depending on the state of the CPHA bit:
– CPHA = 0 — A slave SPI can cause a write collision error by
writing to the SPDR while the PD5/SS pin is at logic 0. The
error does not affect the byte in the SPDR, but the byte that
caused the error is lost.
Serial Peripheral Interface (SPI)
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Serial Peripheral Interface (SPI)
SPI Error Conditions
Technical Data
147

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