X40420S14I-B Intersil, X40420S14I-B Datasheet - Page 3

• Manufacturer Part Number: X40420S14I-B
• Description: IC VOLT MON DUAL SUP/SW 14-SOIC
• Manufacturer: Intersil
• Type: Multi-Voltage Supervisorr

Specifications of X40420S14I-B

• Number Of Voltages Monitored: 2
• Output: Open Drain, Open Drain
• Reset: Active High/Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 2.6V, 4.6V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Low V
from low voltage conditions, resetting the system
when V
RESET/RESET is active until V
operating level and stabilizes. A second voltage moni-
tor circuit tracks the unregulated supply to provide a
power fail warning or monitors different power supply
voltage. Three common low voltage combinations are
available, however, Intersil’s unique circuits allows the
threshold for either voltage monitor to be repro-
grammed to meet special needs or to fine-tune the
threshold for applications requiring higher precision.
A manual reset input provides debounce circuitry for
minimum reset component count.
A battery switch circuit compares V
and connects V
vides voltage to external SRAM or other circuits in the
event of main power failure. The X40420, X40421 can
drive 50mA from V
device only switches to V
the low V
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the WDO signal.
The user selects the interval from three preset values.
PIN CONFIGURATION
PIN DESCRIPTION
Pin
1
2
3
4
5
CC
CC
LOWLINE
CC
detection circuitry protects the user’s system
V2MON
V2FAIL
Name
WDO
MR
voltage threshold and V
falls below the minimum V
OUT
LOWLINE
V2MON
RESET
V2FAIL
WDO
to whichever is higher. This pro-
V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than V
goes HIGH when V2MON exceeds V
V2 Voltage Monitor Input. When the V2MON input is less than the V
LOW. This input can monitor an unregulated power supply with an external resistor divider or can
monitor a second power supply with no external components. Connect V2MON to V
not used.
Early Low V
When
WDO Output. WDO is an active LOW, open drain output which goes active whenever the watchdog
timer goes active.
Manual Reset Input. Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will remain
HIGH/LOW until the pin is released and for the t
CC
V
MR
SS
to 250µA from V
14-Pin SOIC, TSSOP
BATT
3
V
1
2
3
4
5
6
7
CC
X40420
when V
> V
CC
CC
CC
TRIP1
BATT
Detect. This open drain output signal goes LOW when
returns to proper
14
13
12
11
10
with V
CC
9
8
, this pin is pulled high with the use of an external pull up resistor.
.
drops below
TRIP1
V
BATT-ON
V
V
WP
SCL
SDA
BATT
BATT
CC
OUT
BATT
X40420, X40421
. The
point.
input
TRIP2
. There is no power-up reset delay circuitry on this pin.
Once selected, the interval does not change, even
after cycling the power.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil’s Block Lock protection.
The array is internally organized as x 8. The device
features an 2-wire interface and software protocol
allowing operation on a two-wire bus.
The device utilizes Intersil’s proprietary Direct Write
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
Function
Example Application
LOWLINE
PURST
V2MON
V2FAIL
RESET
Unreg.
Supply
WDO
V
MR
SS
thereafter. It has an internal pull up resistor.
14-Pin SOIC, TSSOP
REG
5V
1
2
3
4
5
6
7
X40421
+
V
V
V2MON
CC
BATT
X40420, X40421
SCL SDA
BATT-ON
14
13
12
11
10
9
8
TRIP2
V2FAIL
RESET
V
V
VDO
CC
OUT
MR
V
BATT-ON
V
V
WP
SCL
SDA
CC
OUT
BATT
voltage, V2FAIL goes
< V
TRIP1
Manual
Reset
SS
.
or
NMI
IRQ
RESET
I
2
TRIP2
Enable
C
V
SRAM
Addr
Addr
CC
uC
May 25, 2006
V
CC
when
and
™