MCF5272CVM66 Freescale Semiconductor, MCF5272CVM66 Datasheet - Page 147

• Manufacturer Part Number: MCF5272CVM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Command Sequence:
Operand Data:
Result Data:
5.5.3.3.7
The pipeline is flushed and refilled before normal instruction execution resumes. Prefetching begins at the
current address in the PC and at the current privilege level. If any register (such as the PC or SR) is altered
by a BDM command while the processor is halted, the updated value is used when prefetching resumes.
If a
Command Sequence:
Operand Data:
Result Data:
Freescale Semiconductor
GO
15
command is issued and the CPU is not halted, the command is ignored.
FILL (LONG)
FILL (LONG)
FILL (B/W)
FILL (B/W)
???
???
0x0
Resume Execution (
MCF5272 ColdFire
12
A single operand is data to be written to the memory location. Byte data is sent as
a 16-bit word, justified in the least-significant byte; 16- and 32-bit operands are
sent as 16 and 32 bits, respectively.
Command complete status (0xFFFF) is returned when the register write is
complete. A value of 0x0001 (with S set) is returned if a bus error occurs.
None
The command-complete response (0xFFFF) is returned during the next shift
operation.
"NOT READY"
"NOT READY"
"ILLEGAL"
MS DATA
"ILLEGAL"
DATA
XXX
XXX
11
Figure 5-28.
Figure 5-30.
Figure 5-29.
®
0xC
GO
"NOT READY"
"NOT READY"
"NOT READY"
Integrated Microprocessor User’s Manual, Rev. 3
LOCATION
NEXT CMD
MEMORY
NEXT CMD
GO
???
WRITE
LS DATA
)
FILL
GO
GO
8
Command Sequence
Command Sequence
Command Format
"CMD COMPLETE"
LOCATION
MEMORY
7
WRITE
NEXT CMD
"CMD COMPLETE"
"NOT READY"
NEXT CMD
XXX
BERR
XXX
0x0
"CMD COMPLETE"
"NOT READY"
NEXT CMD
"NOT READY"
4
BERR
NEXT CMD
XXX
XXX
3
"NOT READY"
NEXT CMD
0x0
Debug Support
0
5-29