MCF5272CVM66 Freescale Semiconductor, MCF5272CVM66 Datasheet - Page 455

• Manufacturer Part Number: MCF5272CVM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Table 20-6
device being accessed, and the pattern of the data transfer for write cycles to the external data bus.
For read cycles, the entries shown as Byte X are portions of the requested operand that are read. The
operand being read is defined by the size of the transfer and A[1:0] for the bus cycle. Bytes labeled “X”
are don’t cares and are not required during that read cycle. Bytes labeled “–” are not valid transfers.
For write cycles from the internal multiplexer of the MCF5272 to the external data bus A[1:0] is
incremented according to the transfer size. For example, if a longword transfer is generated to a 16-bit port,
the MCF5272 starts the cycle with A[1:0] set to 0x0 and reads the first word. The address in then
incremented to 0x2 and the second word is read. The data for both word reads is taken from D[31:16].
Bytes labeled “X” are don’t cares.
20.6
The MCF5272 supports three types of external bus interfaces. The interface type is programmed using
CSBRn[EBI]. The EBI codes are summarized in
Freescale Semiconductor
External Bus Interface Types
lists the bytes that should be driven on the data bus during read cycles by the external peripheral
Byte
Word
Longword
Line
Transfer Size A[1:0]
MCF5272 ColdFire
Table 20-6. Data Bus Requirement for Read/Write Cycles
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
D[31:24] D[23:16] D[15:8]
Byte 0
Byte 0
Byte 0
Byte 0
—
—
—
—
—
—
—
—
X
X
X
X
®
Integrated Microprocessor User’s Manual, Rev. 3
Byte 1
Byte 1
Byte 1
Byte 1
32-Bit Port
—
—
—
—
—
—
—
—
X
X
X
X
Table
External Data Bytes Required
Byte 2
Byte 2
Byte 2
Byte2
—
—
—
—
—
—
—
—
X
X
X
X
20-7.
D[7:0]
Byte 3
Byte 3
Byte 3
Byte 3
—
—
—
—
—
—
—
—
X
X
X
X
D[31:24] D[23:16]
Byte 0
Byte 2
Byte 0
Byte 2
Byte 0
Byte 2
Byte 0
Byte 2
—
—
—
—
—
—
X
X
16-Bit Port
Byte 1
Byte 3
Byte 1
Byte 3
Byte 1
Byte 3
Byte 1
Byte 3
—
—
—
—
—
—
X
X
8-Bit Port
D[31:24]
Byte 2
Byte 2
Byte 0
Byte 1
Byte 2
Byte 3
Byte 0
Byte 1
Byte 2
Byte 3
Byte 0
Byte 1
Byte 3
Byte 0
Byte 1
Byte 3
Bus Operation
20-7