MCF5272CVM66 Freescale Semiconductor, MCF5272CVM66 Datasheet - Page 339

• Manufacturer Part Number: MCF5272CVM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Chapter 14
Queued Serial Peripheral Interface (QSPI) Module
This chapter describes the queued serial peripheral interface (QSPI) module. Following a feature-set
overview is a description of operation including details of the QSPI’s internal RAM organization. The
chapter concludes with the programming model and a timing diagram.
14.1
The queued serial peripheral interface module provides a serial peripheral interface with queued transfer
capability. It allows users to enqueue up to 16 transfers at once, eliminating CPU intervention between
transfers. Transfer RAMs in the QSPI are indirectly accessible using address and data registers.
Functionality is very similar, but not identical, to the QSPI portion of the QSM (queued serial module)
implemented in the MC68332.
14.2
14.3
The QSPI module communicates with the integrated ColdFire CPU using internal memory mapped
registers located starting at MBAR + 0xA0. See also
diagram of the QSPI module is shown in
Freescale Semiconductor
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Programmable queue to support up to 16 transfers without user intervention
Supports transfer sizes of 8 to 16 bits in 1-bit increments
Four peripheral chip-select lines for control of up to 15 devices
Baud rates from 129.4 Kbps to 16.5 Mbps at 66 MHz
Programmable delays before and after transfers
Programmable clock phase and polarity
Supports wraparound mode for continuous transfers
Overview
Features
Module Description
MCF5272 ColdFire
®
Integrated Microprocessor User’s Manual, Rev. 3
Figure
14-1.
Section 14.5, “Programming
Model.” A block
14-1