UJA1078ATW/5V0/WD, NXP Semiconductors, UJA1078ATW/5V0/WD, Datasheet - Page 15

• Manufacturer Part Number: UJA1078ATW/5V0/WD,
• Description: IC SBC CAN/LIN 5.0V HS 32HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1078ATW/5V0/WD,

• Controller Type: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 4.5 V ~ 28 V
• Current - Supply: 84µA
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 6.
UJA1078A
Product data sheet
Bit
3
2
1
0
Symbol
STBCC
RTHC
WSE1
WSE2
Int_Control register
Access Power-on
R/W
R/W
R/W
R/W
default
0
0
0
0
…continued
All information provided in this document is subject to legal disclaimers.
Description
CAN standby control
reset threshold control
WAKE1 sample enable
WAKE2 sample enable
0: When the SBC is in Normal mode (MC = 1x):
1: CAN is in Lowpower mode with bus wake-up detection enabled,
regardless of the SBC mode (MC = xx). CAN wake-up interrupts can be
requested.
0: The reset threshold is set to the 90 % V1 undervoltage detection voltage
(V
1: The reset threshold is set to the 70 % V1 undervoltage detection voltage
(V
0: sampling continuously
1: sampling of WAKE1 is synchronized with WBIAS (sample rate controlled
by WBC)
0: sampling continuously
1: sampling of WAKE1 is synchronized with WBIAS (sample rate controlled
by WBC)
When the SBC is in Standby/Sleep mode (MC = 0x):
CAN is in Active mode. The wake-up flag (visible on RXDC) is cleared
regardless of V2 output voltage.
CAN is in Off mode. Bus wake-up detection is disabled. CAN wake-up
interrupts cannot be requested.
uvd
uvd
Rev. 2 — 28 January 2011
; see
; see
Table
Table
10)
10)
High-speed CAN/dual LIN core system basis chip
UJA1078A
© NXP B.V. 2011. All rights reserved.
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