UJA1078ATW/5V0/WD, NXP Semiconductors, UJA1078ATW/5V0/WD, Datasheet - Page 36

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UJA1078ATW/5V0/WD,

Manufacturer Part Number
UJA1078ATW/5V0/WD,
Description
IC SBC CAN/LIN 5.0V HS 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1078ATW/5V0/WD,

Controller Type
System Basis Chip
Interface
CAN, LIN
Voltage - Supply
4.5 V ~ 28 V
Current - Supply
84µA
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 10.
T
voltages are defined with respect to ground; positive currents flow in the IC; typical values are given at V
otherwise specified.
UJA1078A
Product data sheet
Symbol
I
PNP collector; pin VEXCC
V
Voltage source; pin V2
V
ΔV
V
V
V
I
Serial peripheral interface inputs; pins SDI, SCK and SCSN
V
V
R
R
I
Serial peripheral interface data output; pin SDO
I
I
th(deact)PNP
O(sc)
LI(SDI)
OH
OL
vj
th(act)Ilim
O
uvd
uvr
uvhys
th(sw)
hys(i)
pd(SCK)
pu(SCSN)
=
V2
40
°
C to +150
Static characteristics
Parameter
PNP deactivation threshold
current
current limiting activation
threshold voltage
output voltage
voltage variation on pin V2
undervoltage detection
voltage
undervoltage recovery
voltage
undervoltage hysteresis
voltage
short-circuit output current
switching threshold voltage
input hysteresis voltage
pull-down resistance on pin
SCK
pull-up resistance on pin
SCSN
input leakage current on pin
SDI
HIGH-level output current
LOW-level output current
°
C; V
BAT
= 4.5 V to 28 V; V
…continued
All information provided in this document is subject to legal disclaimers.
Conditions
load current falling; external PNP
transistor connected - see
measured across resistor connected
between pins VEXCC and V1 (see
Section
2.97 V ≤ V
6 V < V
V
I
V
I
as a function of supply voltage variation
V
I
as a function of load current variation;
6 V < V
I
V
V
V
V
V
V
V
V2
V2
V2
V2
BAT
BAT
BAT
V2
V1
V1
SCSN
V1
SCSN
V1
BAT
PDC 0
PDC 0; T
PDC 1
PDC 1; T
= −100 mA to −5 mA
= −100 mA to 0 mA
= −120 mA to 0 mA
= −10 mA
= 0 V to 5.5 V
= 2.97 V to 5.5 V
= 2.97 V to 5.5 V
= 2.97 V to 5.5 V
= 2.97 V to 5.5 V
Rev. 2 — 28 January 2011
= 5.5 V to 28 V
= 6 V to 28 V
= 5.5 V to 28 V
> V
= 0 V; V
= 0 V; V
BAT
BAT
6.6.2)
V1
V1
; V
< 28 V
< 28 V
vj
vj
= 150 °C
= 150 °C
≤ 5.5 V
BAT
O
O
= V
= 0.4 V
> V
High-speed CAN/dual LIN core system basis chip
V1
V2
; R
− 0.4 V
LIN1
Section 6.6.2
= R
LIN2
= 500
Ω
Min
44
12
240
4.75
4.75
-
-
4.5
4.55
20
−250
0.3V
100
50
50
−5
−30
1.6
40
11
; R
(CANH-CANL)
V1
UJA1078A
Typ
76
50
22
15
-
5
5
-
-
-
-
-
-
-
-
130
130
-
-
-
BAT
© NXP B.V. 2011. All rights reserved.
= 45
= 14 V; unless
120
36
5.25
5.25
4.75
Max
59
18
330
60
80
4.70
80
−100
0.7V
900
400
400
+5
−1.6
30
Ω
to 65
V1
36 of 54
Ω
Unit
mA
mA
mA
mA
mV
V
V
mV
mV
V
V
mV
mA
V
mV
μA
mA
mA
; all

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