UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 371

8BIT MCU, 60K FLASH, 3KB RAM, LQFP

UPD78F0535GB(T)-UEU-A

Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0535GB(T)-UEU-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
15.4 Operation of Serial Interface UART6
15.4.1 Operation stop mode
addition, the pins can be used as ordinary port pins in this mode. To set the operation stop mode, clear bits 7, 6, and
5 (POWER6, TXE6, and RXE6) of ASIM6 to 0.
(1) Register used
Address: FF50H After reset: 01H R/W
Serial interface UART6 has the following two modes.
• Operation stop mode
• Asynchronous serial interface (UART) mode
In this mode, serial communication cannot be executed; therefore, the power consumption can be reduced. In
Notes 1.
Caution Clear POWER6 to 0 after clearing TXE6 and RXE6 to 0 to stop the operation.
Remark To use the R
Symbol
ASIM6
The operation stop mode is set by asynchronous serial interface operation mode register 6 (ASIM6).
ASIM6 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 01H.
2.
To start the communication, set POWER6 to 1, and then set TXE6 or RXE6 to 1.
FUNCTIONS.
POWER6
The output of the T
POWER6 = 0 during transmission.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), bit 7 (SBRF6) and bit 6 (SBRT6) of asynchronous serial
interface control register 6 (ASICL6), and receive buffer register 6 (RXB6) are reset.
POWER6
RXE6
TXE6
0
<7>
Note 1
0
0
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Disables transmission operation (synchronously resets the transmission circuit).
Disables reception (synchronously resets the reception circuit).
X
D6/P14 and T
TXE6
<6>
X
D6 pin goes high and the input from the R
CHAPTER 15 SERIAL INTERFACE UART6
RXE6
<5>
X
D6/P13 pins as general-purpose port pins, see CHAPTER 5
User’s Manual U17260EJ6V0UD
Enables/disables operation of internal operation clock
Note 2
.
PS61
4
Enables/disables transmission
Enables/disables reception
PS60
3
X
CL6
D6 pin is fixed to high level when
2
SL6
1
ISRM6
0
PORT
371

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