UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 376

8BIT MCU, 60K FLASH, 3KB RAM, LQFP

UPD78F0535GB(T)-UEU-A

Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0535GB(T)-UEU-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
376
1. Stop bit length: 1
2. Stop bit length: 2
(c) Normal transmission
When bit 7 (POWER6) of asynchronous serial interface operation mode register 6 (ASIM6) is set to 1 and bit
6 (TXE6) of ASIM6 is then set to 1, transmission is enabled. Transmission can be started by writing transmit
data to transmit buffer register 6 (TXB6). The start bit, parity bit, and stop bit are automatically appended to
the data.
When transmission is started, the data in TXB6 is transferred to transmit shift register 6 (TXS6). After that,
the transmit data is sequentially output from TXS6 to the T
parity and stop bits set by ASIM6 are appended and a transmission completion interrupt request (INTST6) is
generated.
Transmission is stopped until the data to be transmitted next is written to TXB6.
Figure 15-15 shows the timing of the transmission completion interrupt request (INTST6). This interrupt
occurs as soon as the last stop bit has been output.
T
T
X
X
D6 (output)
D6 (output)
INTST6
INTST6
Figure 15-15. Normal Transmission Completion Interrupt Request Timing
Start
Start
CHAPTER 15 SERIAL INTERFACE UART6
D0
D0
User’s Manual U17260EJ6V0UD
D1
D1
D2
D2
X
D6 pin. When transmission is completed, the
D6
D6
D7
D7
Parity
Parity
Stop
Stop

Related parts for UPD78F0535GB(T)-UEU-A