UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 89

8BIT MCU, 60K FLASH, 3KB RAM, LQFP

UPD78F0535GB(T)-UEU-A

Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0535GB(T)-UEU-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
3.4.8 Based indexed addressing
[Function]
[Operand format]
[Description example]
[Illustration]
The B or C register contents specified in an instruction word are added to the contents of the base register, that
is, the HL register pair in the register bank specified by the register bank select flag (RBS0 and RBS1), and the
sum is used to address the memory. Addition is performed by expanding the B or C register contents as a
positive number to 16 bits. A carry from the 16th bit is ignored.
This addressing can be carried out for all of the memory spaces. However, before addressing a memory bank
that is not set by the memory bank select register (BANK), change the setting of the memory bank by using
BANK.
MOV A, [HL +B]; when selecting B register
The contents of the memory
addressed are transferred.
HL
Identifier
A
16
7
[HL + B], [HL + C]
Operation code
CHAPTER 3 CPU ARCHITECTURE
H
User’s Manual U17260EJ6V0UD
8
0
1
+
7
7
7
Description
0
1
0
1
Memory
L
B
0
1
1
0
0
0
89

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