UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 424

8BIT MCU, 60K FLASH, 3KB RAM, LQFP

UPD78F0535GB(T)-UEU-A

Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0535GB(T)-UEU-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
424
Cautions concerning set timing
• For master reception:
• For master transmission: A start condition cannot be generated normally during the acknowledge period. Set to 1 during
• Cannot be set to 1 at the same time as SPT0.
• Setting STT0 to 1 and then setting it again before it is cleared to 0 is prohibited.
Condition for clearing (STT0 = 0)
• Cleared by setting SST0 to 1 while communication
• Cleared by loss in arbitration
• Cleared after start condition is generated by master device
• Cleared by LREL0 = 1 (exit from communications)
• When IICE0 = 0 (operation stop)
• Reset
Note This flag’s signal is invalid when IICE0 = 0.
Remarks 1. Bit 1 (STT0) becomes 0 when it is read after data setting.
STT0
reservation is prohibited.
0
1
Note
Do not generate a start condition.
When bus is released (in STOP mode):
When a third party is communicating:
In the wait state (when master device):
2. IICRSV: Bit 0 of IIC flag register (IICF0)
Generate a start condition (for starting as master). When the SCL0 line is high level, the SDA0 line is changed
Generates a restart condition after releasing the wait.
from high level to low level and then the start condition is generated. Next, after the rated amount of time has
elapsed, SCL0 is changed to low level (wait state).
• When communication reservation function is enabled (IICRSV = 0)
• When communication reservation function is disabled (IICRSV = 1)
STCF:
Functions as the start condition reservation flag. When set to 1, automatically generates a start condition
after the bus is released.
STCF is set to 1 and information that is set (1) to STT0 is cleared. No start condition is generated.
Bit 7 of IIC flag register (IICF0)
Cannot be set to 1 during transfer. Can be set to 1 only in the waiting period when ACKE0 has
been cleared to 0 and slave has been notified of final reception.
the wait period that follows output of the ninth clock.
Figure 17-5. Format of IIC Control Register 0 (IICC0) (3/4)
CHAPTER 17 SERIAL INTERFACE IIC0
User’s Manual U17260EJ6V0UD
Start condition trigger
Condition for setting (STT0 = 1)
• Set by instruction

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