EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 196

• Manufacturer Part Number: EP9312-CB
• Description: System-on-Chip Processor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CB

• Peak Reflow Compatible (260 C): No
• A/d Converter: 12 Bits
• Leaded Process Compatible: No
• No. Of I/o Pins: 65
• Package / Case: 352-BGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1257

Mode
Shift
0x6
**
**
**
Color
Mode
0x0
0x8
**
**
**
LCDEN subs
ACEN subs
dual 2 2/3
pixels per
Output
CCIREN
Mode
clock
subs
P(23) P(22) P(21) P(20) P(19) P(18) P(17) P(16) P(15) P(14) P(13) P(12) P(11) P(10) P(9) P(8) P(7) P(6) P(5) P(4) P(3) P(2) P(1) P(0)
X
X
X
**
**
**
*These bits are an ORed combination of the bit value shown and the next significant bit below (This rounds the color value to nearest
**These bits do not get a substitute and are defined to the values controlled by the pixel output mode in the upper part of the table.
**
**
**
X
X
X
color).
**
**
**
X
X
X
X
X
X
**
**
**
**
**
**
X
X
X
Table 7-3. Output Pixel Transfer Modes (Continued)
**
**
**
X
X
X
AC
**
**
X
X
X
XECL YSCL
**
**
X
X
X
L G2 L B2 L R1 L G1 L B1 L R0 L G0 L B0 U G2 U B2 U R1
L B5 L R4 L G4 L B4 L R3 L G3 L B3 L R2 U B5 U R4 U G4
L R7 L G7 L B7 L R6 L G6 L B6 L R5 L G5 U R7 U G7 U B7
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
D(7)
**
**
D(6)
**
**
D(5)
**
**
U G1 U B1 U R0 U G0 U B0
U B4 U R3 U G3 U B3 U R2
U R6 U G6 U B6 U R5 U G5
D(4)
**
**
D(3)
**
**
D(2)
**
**
D(1)
**
**
D(0)
77
**
**