EP20K400CB652C7 Altera, EP20K400CB652C7 Datasheet - Page 30

• Manufacturer Part Number: EP20K400CB652C7
• Description: APEX 20KC
• Manufacturer: Altera

APEX 20KC Programmable Logic Device Data Sheet
30
Figure 18. Deep Memory Block Implemented with Multiple ESBs
The ESB implements two forms of dual-port memory: read/write clock
mode and input/output clock mode. The ESB can also be used for
bidirectional, dual-port memory applications in which two ports read or
write simultaneously. To implement this type of dual-port memory, two
ESBs are used to support two simultaneous reads or writes.
The ESB can also use Altera megafunctions to implement dual-port RAM
applications where both ports can read or write, as shown in
Figure 19. APEX 20KC ESB Implementing Dual-Port RAM
Clock A
ESB
ESB
ESB
Address Decoder
address_a[]
data_a[]
we_a
clkena_a
Port A
address_b[]
clkena_b
Port B
data_b[]
we_b
to System Logic
Altera Corporation
Clock B
Figure
19.