P89LPC932A1FA NXP Semiconductors, P89LPC932A1FA Datasheet - Page 17

• Manufacturer Part Number: P89LPC932A1FA
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89LPC932A1FA

• Package: 28PLCC
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• Number Of Timers: 2
• Ram Size: 768 Byte
• Program Memory Size: 8 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
P89LPC932A1_3
Product data sheet
7.3.1 Clock definitions
7.3.2 CPU clock (OSCCLK)
7.3.3 Low speed oscillator option
7.3.4 Medium speed oscillator option
7.3.5 High speed oscillator option
7.3.6 Clock output
7.2 Enhanced CPU
7.3 Clocks
The P89LPC932A1 uses an enhanced 80C51 CPU which runs at six times the speed of
standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most
instructions execute in one or two machine cycles.
The P89LPC932A1 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see
Section 7.8 “CCLK modification: DIVM
Note: f
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output.
PCLK — Clock for the various peripheral devices and is
The P89LPC932A1 provides several user-selectable oscillator options in generating the
CPU clock. This allows optimization for a range of needs from high precision to lowest
possible cost. These options are configured when the flash is programmed and include an
on-chip watchdog oscillator, an on-chip RC oscillator, an oscillator using an external
crystal, or an external clock source. The crystal oscillator can be optimized for low,
medium, or high frequency crystals covering a range from 20 kHz to 18 MHz.
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this configuration.
The P89LPC932A1 supports a user-selectable clock output function on the
XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if
another clock source has been selected (on-chip RC oscillator, watchdog oscillator,
external clock input on X1) and if the RTC is not using the crystal oscillator as its clock
source. This allows external devices to synchronize to the P89LPC932A1. This output is
enabled by the ENCLK bit in the TRIM register.
osc
is defined as the OSCCLK frequency.
Figure
7) and can also be optionally divided to a slower frequency (see
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
register”).
CCLK
P89LPC932A1
2
.
© NXP B.V. 2007. All rights reserved.
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