P89LPC932A1FA NXP Semiconductors, P89LPC932A1FA Datasheet - Page 43

• Manufacturer Part Number: P89LPC932A1FA
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89LPC932A1FA

• Package: 28PLCC
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• Number Of Timers: 2
• Ram Size: 768 Byte
• Program Memory Size: 8 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
P89LPC932A1_3
Product data sheet
7.28.10 Hardware activation of the boot loader
7.28.8 In-system programming
7.28.9 Power-on reset code execution
In addition, IAP operations can be accomplished through the use of four SFRs consisting
of a control/status register, a data register, and two address registers. Additional details
may be found in the P89LPC932A1 User manual .
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC932A1 through the serial port. This firmware
is provided by NXP and embedded within each P89LPC932A1 device. The ISP facility has
made ISP in an embedded application possible with a minimum of additional expense in
components and circuit board area. The ISP function uses five pins (V
and RST). Only a small connector needs to be available to interface your application to an
external circuit in order to use this feature.
The P89LPC932A1 contains two special flash elements: the Boot Vector and the Boot
Status Bit. Following reset, the P89LPC932A1 examines the contents of the Boot Status
Bit. If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which
is the normal start address of the user’s application code. When the Boot Status Bit is set
to a value other than zero, the contents of the Boot Vector are used as the high byte of the
execution address and the low byte is set to 00H.
Table 6
settings are different than the original P89LPC932. Tools designed to support the
P89LPC932A1 should be used to program this device, such as Flash Magic version
1.98, or later. A factory-provided boot loader is preprogrammed into the address space
indicated and uses the indicated boot loader entry point to perform ISP functions. This
code can be erased by the user. Users who wish to use this loader should take
precautions to avoid erasing the 1 kB sector that contains this boot loader. Instead,
the page erase function can be used to erase the first eight 64-byte pages located in
this sector. A custom boot loader can be written with the Boot Vector set to the custom
boot loader, if desired.
Table 6.
The boot loader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC932A1 User manual for specific information). This
has the same effect as having a non-zero status byte. This allows an application to be built
that will normally execute user code but can be manually forced into ISP operation. If the
factory default setting for the Boot Vector (1FH) is changed, it will no longer point to the
factory preprogrammed ISP boot loader code. After programming the flash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
Device
P89LPC932A1
shows the factory default Boot Vector settings for these devices. Note: These
Default Boot Vector values and ISP entry points
Default
Boot Vector
1FH
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
Default
boot loader
entry point
1F00H
Default boot loader
code range
1E00H to 1FFFH
P89LPC932A1
DD
© NXP B.V. 2007. All rights reserved.
, V
1 kB sector
range
1C00H to 1FFFH
SS
, TXD, RXD,
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