P89LPC932A1FA NXP Semiconductors, P89LPC932A1FA Datasheet - Page 7

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P89LPC932A1FA

Manufacturer Part Number
P89LPC932A1FA
Description
MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PLCC Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC932A1FA

Package
28PLCC
Device Core
80C51
Family Name
89LP
Maximum Speed
18 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
Number Of Timers
2
Ram Size
768 Byte
Program Memory Size
8 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C

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Table 2.
P89LPC932A1_3
Product data sheet
Symbol
P0.0 to P0.7
P0.0/CMP2/
KBI0
P0.1/CIN2B/
KBI1
P0.2/CIN2A/
KBI2
P0.3/CIN1B/
KBI3
Pin description
Pin
TSSOP28,
PLCC28,
DIP28
3
26
25
24
6.2 Pin description
Fig 6. P89LPC932A1 DIP28 pin configuration
HVQFN28
27
22
21
20
Type Description
I/O
I/O
O
I
I/O
I
I
I/O
I
I
I/O
I
I
P3.0/XTAL2/CLKOUT
P0.0/CMP2/KBI0
Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type.
During reset Port 0 latches are configured in the input only mode with the
internal pull-up disabled. The operation of Port 0 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to
and
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt trigger inputs.
Port 0 also provides various special functions as described below:
P0.0 — Port 0 bit 0.
CMP2 — Comparator 2 output.
KBI0 — Keyboard input 0.
P0.1 — Port 0 bit 1.
CIN2B — Comparator 2 positive input B.
KBI1 — Keyboard input 1.
P0.2 — Port 0 bit 2.
CIN2A — Comparator 2 positive input A.
KBI2 — Keyboard input 2.
P0.3 — Port 0 bit 3.
CIN1B — Comparator 1 positive input B.
KBI3 — Keyboard input 3.
Rev. 03 — 12 March 2007
P1.3/INT0/SDA
P1.2/T0/SCL
P3.1/XTAL1
8-bit microcontroller with accelerated two-clock 80C51 core
Table 8 “Static characteristics”
P2.2/MOSI
P2.3/MISO
P2.1/OCD
P1.7/OCC
P1.6/OCB
P1.4/INT1
P1.5/RST
P2.0/ICB
V
SS
10
11
12
13
14
1
2
3
4
5
6
7
8
9
P89LPC932A1FN
002aac785
Section 7.13.1 “Port configurations”
28
27
26
25
24
23
22
21
20
19
18
17
16
15
for details.
P2.7/ICA
P2.6/OCA
P0.1/CIN2B/KBI1
P0.2/CIN2A/KBI2
P0.3/CIN1B/KBI3
P0.4/CIN1A/KBI4
P0.5/CMPREF/KBI5
V
P0.6/CMP1/KBI6
P0.7/T1/KBI7
P1.0/TXD
P1.1/RXD
P2.5/SPICLK
P2.4/SS
DD
P89LPC932A1
© NXP B.V. 2007. All rights reserved.
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