P89LPC932A1FA NXP Semiconductors, P89LPC932A1FA Datasheet - Page 18

• Manufacturer Part Number: P89LPC932A1FA
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89LPC932A1FA

• Package: 28PLCC
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• Number Of Timers: 2
• Ram Size: 768 Byte
• Program Memory Size: 8 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
P89LPC932A1_3
Product data sheet
7.4 On-chip RC oscillator option
7.5 Watchdog oscillator option
7.6 External clock input option
The frequency of this clock output is
in Idle mode, it may be turned off prior to entering Idle, saving additional power.
The P89LPC932A1 has a 6-bit TRIM register that can be used to tune the frequency of
the RC oscillator. During reset, the TRIM value is initialized to a factory preprogrammed
value to adjust the oscillator frequency to 7.373 MHz
End-user applications can write to the TRIM register to adjust the on-chip RC oscillator to
other frequencies.
The watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator
can be used to save power when a high clock frequency is not needed.
In this configuration, the processor clock is derived from an external source driving the
P3.1/XTAL1 pin. The rate may be from 0 Hz up to 18 MHz. The P3.0/XTAL2 pin may be
used as a standard port pin or a clock output. When using an oscillator frequency
above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit
is required to hold the device in reset at power-up until V
specified level. When system power is removed, V
specified operating voltage. When using an oscillator frequency above 12 MHz, in
some applications, an external brownout detect circuit may be required to hold the
device in reset when V
Fig 7. Block diagram of oscillator control
XTAL1
XTAL2
(7.3728 MHz 1 %)
(400 kHz
OSCILLATOR
OSCILLATOR
WATCHDOG
RC
MEDIUM FREQUENCY
HIGH FREQUENCY
LOW FREQUENCY
30 %
20%
)
TIMER 0 AND
RCCLK
Rev. 03 — 12 March 2007
TIMER 1
DD
8-bit microcontroller with accelerated two-clock 80C51 core
falls below the minimum specified operating voltage.
1
I
2
2
C-BUS
that of the CCLK. If the clock output is not needed
OSCCLK
PCLK
DIVM
SPI
DD
1 % at room temperature.
CCLK
PCLK
will fall below the minimum
P89LPC932A1
DD
2
UART
has reached its
© NXP B.V. 2007. All rights reserved.
(P89LPC932A1)
32
WDT
RTC
CPU
CCU
PLL
002aaa891
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