P89LPC932A1FA NXP Semiconductors, P89LPC932A1FA Datasheet - Page 2

• Manufacturer Part Number: P89LPC932A1FA
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89LPC932A1FA

• Package: 28PLCC
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• Number Of Timers: 2
• Ram Size: 768 Byte
• Program Memory Size: 8 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
P89LPC932A1_3
Product data sheet
2.3 Comparison to the P89LPC932
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The P89LPC932A1 includes several improvements compared to the P89LPC932. Please
see P89LPC932A1 User manual for additional detailed information.
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In-Circuit Programming (ICP) allows simple production coding with commercial
EPROM programmers. Flash security bits prevent reading of sensitive application
programs.
Serial flash In-System Programming (ISP) allows coding while the device is mounted
in the end application.
In-Application Programming (IAP) of the flash code memory. This allows changing the
code in a running application.
Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
Low voltage reset (brownout detect) allows a graceful system shutdown when power
fails. May optionally be configured as an interrupt.
Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1 A (total power-down with voltage comparators disabled).
Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
Only power and ground connections are required to operate the P89LPC932A1 when
internal reset option is selected.
Four interrupt priority levels.
Eight keypad interrupt inputs, plus two additional external interrupt inputs.
Schmitt trigger port inputs.
Second data pointer.
Emulation support.
Byte-erasability has been added to the user code memory space.
All of the errata described in the P89LPC932 Errata sheet have been fixed.
Serial ICP has been added.
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC932A1
© NXP B.V. 2007. All rights reserved.
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