P89LPC932A1FA NXP Semiconductors, P89LPC932A1FA Datasheet - Page 22

• Manufacturer Part Number: P89LPC932A1FA
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89LPC932A1FA

• Package: 28PLCC
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• Number Of Timers: 2
• Ram Size: 768 Byte
• Program Memory Size: 8 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
Table 5.
[1]
P89LPC932A1_3
Product data sheet
Clock source
External clock input
Low/medium/high speed oscillator
(external crystal or resonator)
Required for operation above 12 MHz.
Number of I/O pins available
7.13.1.1 Quasi-bidirectional output configuration
7.13.1.2 Open-drain output configuration
7.13.1.3 Input-only configuration
7.13.1 Port configurations
All but three I/O port pins on the P89LPC932A1 may be configured by software to one of
four types on a bit-by-bit basis. These are: quasi-bidirectional (standard 80C51 port
outputs), push-pull, open drain, and input-only. Two configuration registers for each port
select the output type for each port pin.
Quasi-bidirectional output type can be used as both an input and output without the need
to reconfigure the port. This is possible because when the port outputs a logic HIGH, it is
weakly driven, allowing an external device to pull the pin LOW. When the pin is driven
LOW, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open-drain output except that there are three pull-up transistors in
the quasi-bidirectional output that serve different purposes.
The P89LPC932A1 is a 3 V device, but the pins are 5 V-tolerant. In quasi-bidirectional
mode, if a user applies 5 V on the pin, there will be a current flowing from the pin to V
causing extra power consumption. Therefore, applying 5 V in quasi-bidirectional mode is
discouraged.
A quasi-bidirectional port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
An open-drain port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
The input-only port configuration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
1. P1.5 (RST) can only be an input and cannot be configured.
2. P1.2 (SCL/T0) and P1.3 (SDA/INT0) may only be configured to be either input-only or
open-drain.
DD
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…continued
Reset option
No external reset (except during power-up)
External RST pin supported
No external reset (except during power-up)
External RST pin supported
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
[1]
[1]
P89LPC932A1
Number of I/O pins
(28-pin package)
25
24
24
23
© NXP B.V. 2007. All rights reserved.
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