PIC16F1526T-I/PT Microchip Technology, PIC16F1526T-I/PT Datasheet - Page 205

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PIC16F1526T-I/PT

Manufacturer Part Number
PIC16F1526T-I/PT
Description
64-pin, 14KB Flash, 768B RAM, 10-bit ADC, 10xCCP, 2xSPI, 2xMI2C, 2xEUSART, 2.3V-
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1526T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1526T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F1526T-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 21-4:
21.2.1
The MSSPx module has five registers for SPI mode
operation. These are:
• MSSPx STATUS register (SSPxSTAT)
• MSSPx Control Register 1 (SSPxCON1)
• MSSPx Control Register 3 (SSPxCON3)
• MSSPx Data Buffer register (SSPxBUF)
• MSSPx Address register (SSPxADD)
• MSSPx Shift register (SSPxSR)
SSPxCON1 and SSPxSTAT are the control and
STATUS registers in SPI mode operation. The
SSPxCON1 register is readable and writable. The
lower 6 bits of the SSPxSTAT are read-only. The upper
two bits of the SSPxSTAT are read/write.
In one SPI Master mode, SSPxADD can be loaded
with a value used in the Baud Rate Generator. More
information on the Baud Rate Generator is available in
Section 21.7 “Baud Rate Generator”
SSPxSR is the shift register used for shifting data in
and out. SSPxBUF provides indirect access to the
SSPxSR register. SSPxBUF is the buffer register to
which data bytes are written, and from which data
bytes are read.
In receive operations, SSPxSR and SSPxBUF
together create a buffered receiver. When SSPxSR
receives a complete byte, it is transferred to SSPxBUF
and the SSPxIF interrupt is set.
During transmission, the SSPxBUF is not buffered. A
write to SSPxBUF will write to both SSPxBUF and
SSPxSR.
 2011 Microchip Technology Inc.
(Not directly accessible)
SPI MODE REGISTERS
SPI Master
SPI MASTER AND MULTIPLE SLAVE CONNECTION
General I/O
General I/O
General I/O
SDOx
SCKx
SDIx
.
Preliminary
PIC16(L)F1526/27
SCKx
SDIx
SDOx
SSx
SCKx
SDIx
SDOx
SSx
SCKx
SDIx
SDOx
SSx
SPI Slave
SPI Slave
SPI Slave
#1
#2
#3
DS41458B-page 205

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