PIC16F1526T-I/PT Microchip Technology, PIC16F1526T-I/PT Datasheet - Page 87

• Manufacturer Part Number: PIC16F1526T-I/PT
• Description: 64-pin, 14KB Flash, 768B RAM, 10-bit ADC, 10xCCP, 2xSPI, 2xMI2C, 2xEUSART, 2.3V-
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1526T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.6.8
The PIR3 register contains the interrupt flag bits, as
shown in
REGISTER 7-8:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
CCP6IF
Register
PIR3 REGISTER
CCP6IF: CCP6 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP5IF: CCP5 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP4IF: CCP4 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP3IF: CCP3 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR5IF: Timer5 Overflow Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR3IF: Timer3 Overflow Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
7-8.
R/W-0/0
CCP5IF
PIR3: PERIPHERAL INTERRUPT REQUEST REGISTER 3
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CCP4IF
R/W-0/0
CCP3IF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
TMR6IF
Note:
PIC16(L)F1526/27
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
TMR5IF
software
R/W-0/0
TMR4IF
should
DS41458B-page 87
ensure
R/W-0/0
TMR3IF
bit 0
the