ADC0858CIN National Semiconductor, ADC0858CIN Datasheet - Page 19

• Manufacturer Part Number: ADC0858CIN
• Description: IC DATA ACQUISITION/MON 20-DIP
• Manufacturer: National Semiconductor
• Type: Data Acquisition System (DAS)r

Specifications of ADC0858CIN

• Resolution (bits): 8 b
• Data Interface: NSC MICROWIRE™, Serial
• Voltage Supply Source: Single Supply
• Voltage - Supply: 5V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Sampling Rate (per Second): -
• Other names: *ADC0858CIN

Figure 3 shows the timing diagram for writing one limit After
2 0 Memory Access Modes
Note that the memory address is clocked in with the MSB
(bit A3) first whereas the limit data is clocked in with the LSB
(bit L0) first
CS is brought low the input word (DI) is clocked in starting
at the first rising edge of CLK Taking CS high after the MSB
(bit L7) of the limit data is loaded completes the write opera-
tion
2 2 WRITE ALL LIMITS MODE
This mode is used to update all memory locations in the limit
RAM An 8-bit limit word is written to each memory location
Note that there are four limit words for the ADC0851 and
sixteen limit words for the ADC0858 To initiate the opera-
tion of the device in the ‘‘write all limits’’ mode the mode
address has to be 1 1 0 1 (see Table I) The data format for
the input word is as shown below
Data Input (DI) Word ADC0851 or ADC0858
FIGURE 3 Timing Diagram for Write One Limit
FIGURE 4 Timing Diagram for Write All Limits
(Continued)
TL H 11021 – 32
19
Figure 4 shows the timing diagram After CS is brought low
When writing all limits memory address is not required The
limit data is sequentially written into the RAM starting at the
location for CH0– Lower Limit and ending at CH1– Upper
Limit for the ADC0851 (see Table IIa) CH7 – Upper Limit for
ADC0858 (see Table IIb) Note that L0 corresponds to the
LSB of the limit data
the input word (DI) is clocked in starting at the first rising
edge of CLK The first four bits of D1 configure the device in
the ‘‘write all limits’’ mode Next the limit data is serially
clocked in To complete the operation CS should be
brought high after the data is loaded
2 3 READ ONE LIMIT MODE
When the mode address is 1 0 1 1 the device is configured
in the ‘‘read one limit’’ mode One 8-bit limit word can be
read from the RAM memory location pointed to by the limit
address The data format for the input word is as shown
below
Data Input (DI) ADC0851 or ADC0858
TL H 11021 – 34
TL H 11021 – 35
TL H 11021– 33