IC MAX 7000 CPLD 64 100-TQFP

EPM7064STI100-7N

Manufacturer Part NumberEPM7064STI100-7N
DescriptionIC MAX 7000 CPLD 64 100-TQFP
ManufacturerAltera
SeriesMAX® 7000
EPM7064STI100-7N datasheet
 


Specifications of EPM7064STI100-7N

Programmable TypeIn System ProgrammableDelay Time Tpd(1) Max7.5ns
Voltage Supply - Internal4.5 V ~ 5.5 VNumber Of Logic Elements/blocks4
Number Of Macrocells64Number Of Gates1250
Number Of I /o68Operating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case100-TQFP, 100-VQFP
Voltage5VMemory TypeEEPROM
Number Of Logic Elements/cells4Lead Free Status / RoHS StatusLead free / RoHS Compliant
Features-Other names544-2315
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Page 8/66

Download datasheet (2Mb)Embed
PrevNext
MAX 7000 Programmable Logic Device Family Data Sheet
Figure 2
Figure 2. MAX 7000E & MAX 7000S Device Block Diagram
INPUT/GCLK1
INPUT/OE2/GCLK2
INPUT/OE1
INPUT/GCLRn
6 Output Enables
6 to16
6 to16
I/O
6 to 16 I/O Pins
Control
Block
6
6 to16
6 to16
I/O
6 to 16 I/O Pins
Control
Block
6
Logic Array Blocks
The MAX 7000 device architecture is based on the linking of high-
performance, flexible, logic array modules called logic array blocks
(LABs). LABs consist of 16-macrocell arrays, as shown in
Multiple LABs are linked together via the programmable interconnect
array (PIA), a global bus that is fed by all dedicated inputs, I/O pins, and
macrocells.
8
shows the architecture of MAX 7000E and MAX 7000S devices.
LAB A
36
36
Macrocells
1 to 16
16
16
6 to16
6 to16
PIA
LAB C
36
36
Macrocells
33 to 48
16
16
6 to16
6 to16
6 Output Enables
LAB B
6 to16
6 to16
Macrocells
I/O
17 to 32
6 to 16 I/O Pins
Control
Block
6
LAB D
6 to16
6 to16
Macrocells
I/O
6 to 16 I/O Pins
49 to 64
Control
Block
6
Figures 1
Altera Corporation
and 2.