EP2C5F256C8 | |
|---|---|
| Manufacturer Part Number | EP2C5F256C8 |
| Description | IC CYCLONE II FPGA 5K 256-FBGA |
| Manufacturer | Altera |
| Series | Cyclone® II |
| EP2C5F256C8 datasheets |
|
Availability: In stock
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Warranty: 60 days
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Specifications of EP2C5F256C8 | |||
|---|---|---|---|
| Number Of Logic Elements/cells | 4608 | Number Of Labs/clbs | 288 |
| Total Ram Bits | 119808 | Number Of I /o | 158 |
| Voltage - Supply | 1.15 V ~ 1.25 V | Mounting Type | Surface Mount |
| Operating Temperature | 0°C ~ 85°C | Package / Case | 256-FBGA |
| Family Name | Cyclone® II | Number Of Logic Blocks/elements | 4608 |
| # I/os (max) | 158 | Frequency (max) | 402.58MHz |
| Process Technology | 90nm | Operating Supply Voltage (typ) | 1.2V |
| Logic Cells | 4608 | Ram Bits | 119808 |
| Operating Supply Voltage (min) | 1.15V | Operating Supply Voltage (max) | 1.25V |
| Operating Temp Range | 0C to 85C | Operating Temperature Classification | Commercial |
| Mounting | Surface Mount | Pin Count | 256 |
| Package Type | FBGA | No. Of Macrocells | 4608 |
| Family Type | Cyclone II | No. Of I/o's | 158 |
| Clock Management | PLL | I/o Supply Voltage | 3.6V |
| Operating Frequency Max | 320MHz | Rohs Compliant | No |
| Lead Free Status / RoHS Status | Contains lead / RoHS non-compliant | Number Of Gates | - |
| Other names | 544-1446 | ||
PrevNext
Table 5–19. M4K Block Internal Timing Microparameters (Part 3 of 3)
Parameter
TM4KCLR
Notes to
Table
5–19:
(1)
For the –6 speed grades, the minimum timing is for the commercial temperature grade. The –7 speed grade devices
offer the automotive temperature grade. The –8 speed grade devices offer the industrial temperature grade.
(2)
For each parameter of the –7 speed grade columns, the value in the first row represents the minimum timing
parameter for automotive devices. The second row represents the minimum timing parameter for commercial
devices.
(3)
For each parameter of the –8 speed grade columns, the value in the first row represents the minimum timing
parameter for industrial devices. The second row represents the minimum timing parameter for commercial
devices.
Cyclone II Clock Timing Parameters
Refer to
Table 5–20. Cyclone II Clock Timing Parameters
t
C I N
t
C O U T
t
P L L C I N
t
P L L C O U T
EP2C5/A Clock Timing Parameters
Tables 5–21
devices.
Table 5–21. EP2C5/A Column Pins Global Clock Timing Parameters (Part 1 of 2)
Fast Corner
Parameter
Industrial/
Commercial
Automotive
t
1.283
C I N
t
1.297
C O U T
t
–0.188
P L L C I N
Altera Corporation
February 2008
DC Characteristics and Timing Specifications
–6 Speed Grade
(1)
–7 Speed Grade
Min
Max
Min
191
—
244
—
—
217
Tables 5–20
through
5–34
for Cyclone II clock timing parameters.
Symbol
Delay from clock pad to I/O input register
Delay from clock pad to I/O output register
inclk
Delay from PLL
inclk
Delay from PLL
and
5–22
show the clock timing parameters for EP2C5/A
–7 Speed
–6 Speed
Grade
Grade
(1)
1.343
2.329
2.484
1.358
2.363
2.516
–0.201
0.076
0.038
(2)
–8 Speed Grade
(3)
Max
Min
Max
—
244
—
—
244
—
Parameter
pad to I/O input register
pad to I/O output register
–7 Speed
–8 Speed
Grade
Grade
(2)
2.688
2.688
2.717
2.717
0.042
0.052
Cyclone II Device Handbook, Volume 1
Unit
ps
ps
Unit
ns
ns
ns
5–23
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