IC CYCLONE II FPGA 5K 256-FBGA

 

EP2C5F256C8

Manufacturer Part NumberEP2C5F256C8
DescriptionIC CYCLONE II FPGA 5K 256-FBGA
ManufacturerAltera
SeriesCyclone® II
EP2C5F256C8 datasheets

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Specifications of EP2C5F256C8

Number Of Logic Elements/cells4608Number Of Labs/clbs288
Total Ram Bits119808Number Of I /o158
Voltage - Supply1.15 V ~ 1.25 VMounting TypeSurface Mount
Operating Temperature0°C ~ 85°CPackage / Case256-FBGA
Family NameCyclone® IINumber Of Logic Blocks/elements4608
# I/os (max)158Frequency (max)402.58MHz
Process Technology90nmOperating Supply Voltage (typ)1.2V
Logic Cells4608Ram Bits119808
Operating Supply Voltage (min)1.15VOperating Supply Voltage (max)1.25V
Operating Temp Range0C to 85COperating Temperature ClassificationCommercial
MountingSurface MountPin Count256
Package TypeFBGANo. Of Macrocells4608
Family TypeCyclone IINo. Of I/o's158
Clock ManagementPLLI/o Supply Voltage3.6V
Operating Frequency Max320MHzRohs CompliantNo
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantNumber Of Gates-
Other names544-1446  
show all specifications
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Timing Specifications
Table 5–49. Mini-LVDS Transmitter Timing Specification (Part 2 of 2)
–6 Speed Grade
Symbol
Conditions
Min
Device
×10
100
operation
×8
80
in Mbps
×7
70
×4
40
×2
20
×1
10
t
—
45
D U T Y
TCCS
—
—
Output
—
—
jitter (peak
to peak)
t
20–80%
—
R I S E
t
80–20%
—
F A L L
t
—
L O C K
In order to determine the transmitter timing requirements, mini-LVDS
receiver timing requirements on the other end of the link must be taken
into consideration. The mini-LVDS receiver timing parameters are
typically defined as t
timing parameter specifications are t
Refer to
The AC timing requirements for mini-LVDS are shown in
Figure 5–6. mini-LVDS Transmitter AC Timing Specification
LVDSCLK[]n
LVDSCLK[]p
LVDS[]p
LVDS[]n
Notes to
Figure
5–6:
(1)
The data setup time, t
, is 0.225 × TUI.
SU
(2)
The data hold time, t
, is 0.225 × TUI.
H
5–60
Cyclone II Device Handbook, Volume 1
–7 Speed Grade
Typ
Max
Min
Typ
Max
—
311
100
—
311
—
311
80
—
311
—
311
70
—
311
—
311
40
—
311
—
311
20
—
311
—
311
10
—
311
—
55
45
—
55
—
200
—
—
200
—
500
—
—
500
—
500
—
—
500
—
500
—
—
500
—
100
—
—
100
and t
requirements. Therefore, the transmitter
SU
H
CO
Figure 5–4
for the timing budget.
TUI
t
(1)
t
(2)
t
(1)
SU
H
SU
–8 Speed Grade
Unit
Min
Typ
Max
100
—
311
Mbps
80
—
311
Mbps
70
—
311
Mbps
40
—
311
Mbps
20
—
311
Mbps
10
—
311
Mbps
45
—
55
%
—
—
200
ps
—
—
500
ps
—
—
500
ps
—
—
500
ps
μs
—
—
100
(minimum) and t
(maximum).
CO
Figure
5–6.
t
(2)
H
Altera Corporation
February 2008

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