MC8641DVU1333JE Freescale Semiconductor, MC8641DVU1333JE Datasheet - Page 3

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MC8641DVU1333JE

Manufacturer Part Number
MC8641DVU1333JE
Description
IC MPU DUAL CORE E600 1023FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC8641DVU1333JE

Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.333GHz
Voltage
1.05V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Family Name
MPC8xxx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
1.333GHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.05V
Operating Supply Voltage (max)
1.1V
Operating Supply Voltage (min)
1V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1023
Package Type
FCCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC8641DVU1333JE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.1
The following lists an overview of the MPC8641 key feature set:
Freescale Semiconductor
Major features of the e600 core are as follows:
— High-performance, 32-bit superscalar microprocessor that implements the PowerPC ISA
— Eleven independent execution units and three register files
— Three issue queues, FIQ, VIQ, and GIQ, can accept as many as one, two, and three instructions,
— Rename buffers
— Dispatch unit
— Completion unit
— Two separate 32-Kbyte instruction and data level 1 (L1) caches
— Integrated 1-Mbyte, eight-way set-associative unified instruction and data level 2 (L2) cache
— 36-bit real addressing
— Separate memory management units (MMUs) for instructions and data
— Multiprocessing support features
— Power and thermal management
— Performance monitor
— In-system testability and debugging features
— Reliability and serviceability
MPX coherency module (MCM)
— Ten local address windows plus two default windows
— Optional low memory offset mode for core 1 to allow for address disambiguation
Address translation and mapping units (ATMUs)
— Eight local access windows define mapping within local 36-bit address space
— Inbound and outbound ATMUs map to larger external address spaces
— Three inbound windows plus a configuration window on PCI Express
— Four inbound windows plus a default window on serial RapidIO
— Four outbound windows plus default translation for PCI Express
— Eight outbound windows plus default translation for serial RapidIO with segmentation and
Key Features
– Branch processing unit (BPU)
– Four integer units (IUs) that share 32 GPRs for integer operands
– 64-bit floating-point unit (FPU)
– Four vector units and a 32-entry vector register file (VRs)
– Three-stage load/store unit (LSU)
respectively, in a cycle.
with ECC
sub-segmentation support
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Overview
3

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