MC8641DVU1333JE Freescale Semiconductor, MC8641DVU1333JE Datasheet - Page 46

• Manufacturer Part Number: MC8641DVU1333JE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8641DVU1333JE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.333GHz
• Voltage: 1.05V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Family Name: MPC8xxx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 1.333GHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.05V
• Operating Supply Voltage (max): 1.1V
• Operating Supply Voltage (min): 1V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1023
• Package Type: FCCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Local Bus
Figure 25
46
Local bus clock to LALE assertion
Output hold from local bus clock (except LAD/LDP and LALE)
Output hold from local bus clock for LAD/LDP
Local bus clock to output high Impedance (except LAD/LDP and
LALE)
Local bus clock to output high impedance for LAD/LDP
Note:
1. The symbols used for timing specifications herein follow the pattern of t
2. All timings are in reference to LSYNC_IN for PLL enabled and internal local bus clock for PLL bypass mode.
3. All signals are measured from OV
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
6. t
7. Maximum possible clock skew between a clock LCLK[m] and a relative clock LCLK[n]. Skew measured between
8. Guaranteed by design.
(reference)(state)
symbolizes local bus timing (LB) for the input (I) to go invalid (X) with respect to the time the t
high (H), in this case for clock one(1). Also, t
high (H), with respect to the output (O) going invalid (X) or output hold time.
bypass mode to 0.4 × OV
through the component pin is less than or equal to the leakage current specification.
programmed with the LBCR[AHD] parameter.
complementary signals at BV
LBOTOT
is a measurement of the minimum time between the negation of LALE and any change in LAD. t
provides the AC test load for the local bus.
Table 41. Local Bus Timing Parameters (OV
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
for inputs and t
Output
DD
Parameter
of the signal in question for 3.3-V signaling levels.
DD
(First two letters of functional block)(reference)(state)(signal)(state)
/2.
DD
/2 of the rising edge of LSYNC_IN for PLL enabled or internal local bus clock for PLL
Figure 25. Local Bus AC Test Load
LBKHOX
Z
0
= 50 Ω
symbolizes local bus timing (LB) for the t
DD
= 3.3 V)m - PLL Enabled (continued)
Symbol
t
t
t
t
t
LBKHOV4
LBKHOX1
LBKHOX2
LBKHOZ1
LBKHOZ2
(First two letters of functional block)(signal)(state)
R
L
= 50 Ω
1
Min
0.7
0.7
for outputs. For example, t
—
—
—
OV
DD
LBK
LBK
Max
/2
2.3
2.5
2.5
—
—
clock reference (K) to go
clock reference (K) goes
Freescale Semiconductor
LBOTOT
Unit
ns
ns
ns
ns
ns
LBIXKH1
is
Notes
—
3
3
5
5