LUPXA255A0C200

Manufacturer Part NumberLUPXA255A0C200
DescriptionIC MICRO PROCESSOR 200MHZ 256BGA
ManufacturerIntel
LUPXA255A0C200 datasheets
 

Specifications of LUPXA255A0C200

Processor TypeXScale®Speed200MHz
Voltage3.3VMounting TypeSurface Mount
Package / Case256-BGALead Free Status / RoHS StatusLead free / RoHS Compliant
Features-Other names866868
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Electrical Specifications
Figure 8. SSP AC Timing Definitions
SCLK_C
SFRM_C
TXD_C
RXD_C
Table 24. SSP AC Timing Specifications
Symbol
Tsfmv
SCLK_C rise to SFRM_C driven valid
Trxds
RXD_C valid to SCLK_C fall (input setup)
SCLK_C fall to RXD_C invalid (input
Trxdh
hold)
Tsfmv
SCLK_C rise to TXD_C valid
4.9.3
Boundary Scan Test Signal Timings
Table 25, “Boundary Scan Test Signal Timing”
Table 25. Boundary Scan Test Signal Timing (Sheet 1 of 2)
Symbol
TBSF
TCK frequency
TBSCH
TCK high time
TBSCL
TCK low time
TBSCR
TCK rise time
TBSCF
TCK fall time
TBSIS1
Input setup to TCK TDI, TMS
TBSIH1
Input hold from TCK TDI, TMS
TBSIS2
Input setup to TCK nTRST
TBSIH2
Input hold from TCK nTRST
TBSOV1
TDO valid delay
TOF1
TDO float delay
TOV12
All outputs (non-test) valid delay
38
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
T sfmv
T sfmv
T rxds
Description
shows the boundary scan test signal timing.
Parameter
Min
Max
0.0
33.33
15.0
15.0
5.0
5.0
4.0
6.0
25.0
3.0
1.5
6.9
1.1
5.4
1.5
6.9
T rxdh
A4774-01
Min
Max
Units
Notes
21
ns
11
ns
0
ns
22
ns
Units
Notes
MHz
ns
Measured at 1.5 V
ns
Measured at 1.5 V
ns
0.8 V to 2.0 V
ns
2.0 V to 0.8 V
ns
ns
ns
ns
ns
Relative to falling edge of TCK
ns
Relative to falling edge of TCK
ns
Relative to falling edge of TCK