NHPXA270C5C520 Intel, NHPXA270C5C520 Datasheet - Page 92

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NHPXA270C5C520

Manufacturer Part Number
NHPXA270C5C520
Description
IC MPU 32BIT 520MHZ 356-PBGA
Manufacturer
Intel
Datasheet

Specifications of NHPXA270C5C520

Processor Type
XScale®
Speed
520MHz
Voltage
1.45V
Mounting Type
Surface Mount
Package / Case
356-PBGA
For Use With
460-3472 - KIT DEV ZOOM STARTER FOR PXA270
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
868459

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Intel® PXA270 Processor
AC Timing Specifications
6-28
Figure 6-17. First-Access Latency Configuration Timing
MD (Code = 2)
MD (Code = 3)
MD (Code = 4)
MD (Code = 5)
MD (Code = 6)
MD (Code = 7)
SDCLK<0>
DQM<3:0>
MA<19:0>
nSDCAS
nCS<0>
Figure 6-17
nSDCAS(ADV), depending on the configuration of the SXCNFG[SXCLx] bit field. The period in
the diagram indicated by different frequency configuration codes (Fcodes or FCCs) is equal to the
number of SDCLK0 cycles between the READ command and the clock edge on which data is
driven onto the bus.
indicates which clock data would be latched following the assertion of
NOTE: CODE = Frequency Configuration Code
Code 2
Code 3
Code 4
Code 5
Valid Address
Electrical, Mechanical, and Thermal Specification
Beat 0
Code 6
0b0000
Code 7
Beat 0
Beat 1
Beat 0
Beat 2
Beat 1
Beat 0
Beat 1 Beat 2
Beat 3 Beat 4
Beat 2 Beat 3
Beat 1
Beat 0
Beat 3
Beat 2
Beat 0
Beat 5
Beat 4
Beat 1

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