IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 107

• Manufacturer Part Number: IDT82V2108PX8
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX8

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX8

IDT82V2108
Table 42: Various Operation Modes in Transmit Path for Reference (Continued)
Operation
Transmit Clock
Transmit Multi-
Master Mode
plexed Mode
Mode
Register
01BH
09BH
11BH
19BH
21BH
29BH
31BH
39BH
0C0H
1C0H
2C0H
3C0H
018H
040H
004H
003H
083H
103H
183H
203H
283H
303H
383H
018H
098H
118H
198H
218H
298H
318H
398H
040H
140H
240H
340H
004H
084H
104H
184H
204H
284H
304H
384H
1
Value (from Bit7 to Bit0)
00100100
01000000
01010000
01000000
01010000
01000000
01010000
01000000
01010000
00000001
00011001
01110000
00110011
00110011
00110011
00110011
00110011
00110011
00110011
00110011
00000000
00000000
00000001
00000010
00000010
00000011
00000011
01110000
01110000
01110000
01110000
01110000
01110000
01110000
01110000
00011101
00011101
00011101
00011101
00011101
00011101
00011101
00011101
In the Transmit Clock Master Full E1 mode.
Channel Associated Signaling (CAS) is enabled. The CRC Multi-Frame is generated.
XCK/24 is selected as TJAT input reference clock. XCK/24 is selected as Line Transmit Clock
(LTCK).
The data stream is taken from the multiplexed bus 1.
The data stream is taken from the multiplexed bus 2.
The data stream is taken from the multiplexed bus 1.
The data stream is taken from the multiplexed bus 2.
The data stream is taken from the multiplexed bus 1.
The data stream is taken from the multiplexed bus 2.
The data stream is taken from the multiplexed bus 1.
The data stream is taken from the multiplexed bus 2.
In the Transmit Multiplexed mode. The FE is logic 0 and the DE is logic 1.
TSOFF[6:0] = 0. The time slot offset is 0.
TSOFF[6:0] = 1. The time slot offset is 1.
TSOFF[6:0] = 2. The time slot offset is 2.
TSOFF[6:0] = 3. The time slot offset is 3.
Channel Associated Signaling (CAS) is enabled. The CRC Multi-Frame is generated.
TSCCKA is selected as TJAT input reference clock. Smoothed clock is selected as Line Transmit
Clock (LTCK).
97
Description
2
T1 / E1 / J1 OCTAL FRAMER
March 5, 2009