IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 89

• Manufacturer Part Number: IDT82V2108PX8
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX8

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX8

IDT82V2108
the A, B, C, D (b3~0, T1/J1-TPLC-indirect registers - 31~48H) when the
SIGC[1:0] (b7~6, T1/J1-TPLC-indirect registers - 31~48H) is configured.
044H) to be in GTE and Bell Zero Code Suppression when the bits in a
channel are all zeros. The setting in the GZCS[1:0] (b1~0, T1/J1-044H)
is logically ORed with the setting in the ZCS[1:0] (b1~0, T1/J1-TPLC-
indirect registers - 01~18H).
written into the indirect registers is in the D[7:0] (b7~0, T1/J1-033H). The
read or write operation is determined by the R/WB (b7, T1/J1-032H).
Before the read/write operation is completed, the BUSY (b7, T1/J1-
031H) will be set. New operations on the indirect registers can only be
implemented when the BUSY (b7, T1/J1-031H) is cleared The read/
write cycle is 650 ns.
Functional Description
- Replace the signaling input from the TSSIGn pin with the value in
The data of all channels can be set by the GZCS[1:0] (b1~0, T1/J1-
Addressed by the A[6:0] (b6~0, T1/J1-032H), the data read from or
79
3.15
3.15.1
CRC-4 Multi-Frame and Channel Associated Signaling (CAS) Multi-
Frame. The Frame Generator can also transmit alarm indication signal
when special conditions occurs in the received data stream. Interna-
tional bits, National bits and Extra bits replacement and data inversion
are all supported in the Frame Generator.
3.15.1.1
Frame, CRC-4 Multi-Frame and Signaling Multi-Frame.
logic 0. The Basic Frame alignment sequence (FAS) - X0011011 will
replace the data on the TS0 of each even frame and a logic 1 should be
fixed in the 2nd bit of each odd frame.
E1-040H) when the INDIS (b1, E1-040H) is logic 0. The CRC-4 Multi-
Frame alignment pattern - 001011 will replace the data on the Interna-
tional bits of the odd basic frames 1~11, and the calculated CRC bits will
replace the data on the International bits of the even Basic Frames. The
CRC bits are calculated every Sub Multi-Frame (SMF) and located in the
next SMF. If the data input from the TSDn pin has already been in CRC
Multi-Frame format, the CRC bits can be modified by setting the PATH-
CRC (b4, E1-002H) to transmit the CRC-4 transparently or modify the
CRC-4 bits.
E1-040H) & the DLEN (b5, E1-040H) to logic 1 (CAS enable). The Sig-
naling Multi-Frame alignment pattern - 0000 will replace the higher nib-
ble (b1 ~ b4) of TS16 of Basic Frame 0, and the signaling source
selected by the SIGSRC (b4, E1-TPLC-indirect registers - 61~7FH) will
replace the data on TS16 of Basic Frame 1~15 (refer to Chapter 3.14
Transmit Payload Control (TPLC)). When the Signaling Multi-Frame is
not generated, setting a logic 1 in the MTRK (b7, E1-041H) will substi-
tute the IDLE code set in the IDLE[7:0] (b7~0, E1-TPLC-indirect regis-
ters - 40~5FH) for all the data on TS1 ~ 31. When the Signaling Multi-
Frame is generated, the setting will only substitute the IDLE code for
TS1~15 and TS17~31. TS16 is occupied by signaling. However, the
MTRK (b7, E1-041H) takes effect only when the PCCE (b0, E1-060H) in
the Transmit Payload Control is logic 1.
3.15.1.2
indication will be transmitted automatically. The alarm indication can
also be transmitted manually.
tion (RAI) signal. It is controlled by the REMAIS (b3, E1-041H), the
AUTOYELLOW (b3, E1-000H) and the G706RAI (b0, E1-00EH) as illus-
trated in Table 36.
The Frame Generator of each framer operates independently.
In E1 mode, the Frame Generator can generate Basic Frame,
In E1 mode, the data to be transmitted can be formed to be Basic
The Basic Frame is generated when the FDIS (b3, E1-040H) is
The CRC-4 Multi-Frame is generated by setting the GENCRC (b4,
The Signaling Multi-Frame is generated by setting the SIGEN (b6,
When special conditions occurs in the received data stream, alarm
A logic 1 in the 3rd bit of NFAS (A bit) is the Remote Alarm Indica-
FRAME GENERATOR (FRMG)
E1 MODE
Generation
Alarm Indication
T1 / E1 / J1 OCTAL FRAMER
March 5, 2009