IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 207

• Manufacturer Part Number: IDT82V2108PX8
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX8

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX8

IDT82V2108
E1 RCRB Time Slot Indirect Data Buffer (COSS = 0) (067H, 0E7H, 167H, 1E7H, 267H, 2E7H, 367H, 3E7H)
isters, the byte to be written must be written into this register before the target indirect register address and R/WB = 0 is written into the Address/Con-
trol register, initiating the access. If data is to be read from the indirect registers, only the target indirect register address and R/WB = 1 is written into
the Address/Control register, initiating the request. After 490 ns, this register will contain the requested data byte.
E1 RCRB Change of Signaling State (COSS = 1) (064H, 0E4H, 164H, 1E4H, 264H, 2E4H, 364H, 3E4H)
COSS:
COSSn:
E1 RCRB Change of Signaling State (COSS = 1) (065H, 0E5H, 165H, 1E5H, 265H, 2E5H, 365H, 3E5H)
COSSn:
Programming Information
Bit Name
Bit Name
Bit Name
Default
Default
Default
Bit No.
Bit No.
Bit No.
Type
Type
Type
This register holds the value which will be read from or written to the indirect registers (from 20H to 7FH). If data is to be written to the indirect reg-
= 0: Allow the RCRB registers to access the indirect registers.
= 1: Allow the RCRB registers to reflect the change of the signaling of its corresponding time slot.
= 0: The signaling in its corresponding time slot is not changed.
= 1: The signaling in its corresponding time slot is changed.
These bits are cleared to ‘0’ after the register is read. COSS[30:25] correspond to time slots 31 to 26.
= 0: The signaling in its corresponding time slot is not changed.
= 1: The signaling in its corresponding time slot is changed.
These bits are cleared to ‘0’ after the register is read. COSS[24:17] correspond to time slots 25 to 18.
COSS[24]
Reserved
R/W
D7
X
R
X
7
7
7
COSS[23]
COSS
R/W
R/W
D6
R
6
X
6
0
6
X
COSS[30]
COSS[22]
R/W
D5
X
R
X
R
X
5
5
5
COSS[29]
COSS[21]
R/W
D4
X
R
X
R
X
4
4
4
197
COSS[28]
COSS[20]
R/W
D3
X
R
X
R
X
3
3
3
COSS[27]
COSS[19]
R/W
D2
R
R
2
X
2
X
2
X
T1 / E1 / J1 OCTAL FRAMER
COSS[26]
COSS[18]
R/W
D1
X
R
X
R
X
1
1
1
March 5, 2009
COSS[25]
COSS[17]
R/W
D0
X
R
X
R
X
0
0
0